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74ABT574 PDF даташит

Спецификация 74ABT574 изготовлена ​​​​«Fairchild Semiconductor» и имеет функцию, называемую «Octal D-Type Flip-Flop with 3-STATE Outputs».

Детали детали

Номер произв 74ABT574
Описание Octal D-Type Flip-Flop with 3-STATE Outputs
Производители Fairchild Semiconductor
логотип Fairchild Semiconductor логотип 

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74ABT574 Даташит, Описание, Даташиты
November 1992
Revised November 1999
74ABT574
Octal D-Type Flip-Flop with 3-STATE Outputs
General Description
The ABT574 is an octal flip-flop with a buffered common
Clock (CP) and a buffered common Output Enable (OE).
The information presented to the D inputs is stored in the
flip-flops on the LOW-to-HIGH Clock (CP) transition.
The device is functionally identical to the ABT374 but has
broadside pinouts.
Features
s Inputs and outputs on opposite sides of package
allowing easy interface with microprocessors
s Useful as input or output port for microprocessors
s Functionally identical to ABT374
s 3-STATE outputs for bus-oriented applications
s Output sink capability of 64 mA, source capability
of 32 mA
s Guaranteed output skew
s Guaranteed multiple output switching specifications
s Output switching specified for both 50 pF and
250 pF loads
s Guaranteed simultaneous switching, noise level and
dynamic threshold performance
s Guaranteed latchup protection
s High impedance glitch free bus loading during entire
power up and power down cycle
s Non-destructive hot insertion capability
Ordering Code:
Order Number Package Number
Package Description
74ABT574CSC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300Wide Body
74ABT574CSJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ABT574CMSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74ABT574CMTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
Description
D0D7
CP
Data Inputs
Clock Pulse Input (Active Rising Edge)
OE 3-STATE Output Enable Input (Active LOW)
O0O7 3-STATE Outputs
© 1999 Fairchild Semiconductor Corporation DS011511
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74ABT574 Даташит, Описание, Даташиты
Functional Description
The ABT574 consists of eight edge-triggered flip-flops with
individual D-type inputs and 3-STATE true outputs. The
buffered clock and buffered Output Enable are common to
all flip-flops. The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold times
requirements on the LOW-to-HIGH Clock (CP) transition.
Function Table
With the Output Enable (OE) LOW, the contents of the
eight flip-flops are available at the outputs. When OE is
HIGH, the outputs are in a high impedance state. Opera-
tion of the OE input does not affect the state of the flip-
flops.
OE
H
H
H
H
L
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Transition
NC = No Change
L
Logic Diagram
Inputs
CP
H or L
H or L




H or L
H or L
Internal Outputs
Function
DQO
L NC Z Hold
H NC Z Hold
L L Z Load
H H Z Load
L L L Data Available
H H H Data Available
L NC NC No Change in Data
H NC NC No Change in Data
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74ABT574 Даташит, Описание, Даташиты
Absolute Maximum Ratings(Note 1)
Storage Temperature
65°C to +150°C
Ambient Temperature under Bias
55°C to +125°C
Junction Temperature under Bias
55°C to +150°C
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
0.5V to +7.0V
0.5V to +7.0V
Input Current (Note 2)
30 mA to +5.0 mA
Voltage Applied to Any Output
in the Disabled or
Power-Off State
0.5V to 5.5V
in the HIGH State
Current Applied to Output
0.5V to VCC
in LOW State (Max)
DC Latchup Source Current
twice the rated IOL (mA)
500 mA
Over Voltage Latchup (I/O)
10V
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
Minimum Input Edge Rate (V/t)
Data Input
Enable Input
Clock Input
40°C to +85°C
+4.5V to +5.5V
50 mV/ns
20 mV/ns
100 mV/ns
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
VIH
VIL
VCD
VOH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
VOL Output LOW Voltage
IIH Input HIGH Current
Min
2.0
2.5
2.0
IBVI Input HIGH Current Breakdown Test
IIL Input LOW Current
VID Input Leakage Test
4.75
IOZH
IOZL
IOS
ICEX
IZZ
ICCH
ICCL
ICCZ
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Output High Leakage Current
Bus Drainage Test
Power Supply Current
Power Supply Current
Power Supply Current
100
ICCT
Additional ICC/Input Outputs Enabled
Outputs 3-STATE
Outputs 3-STATE
Typ
ICCD
Dynamic ICC
(Note 3)
No Load
Note 3: Guaranteed, but not tested.
Note 4: For 8-bit toggling, ICCD < 0.8 mA/MHz.
Max
0.8
1.2
0.55
1
1
7
1
1
10
10
275
50
100
50
30
50
2.5
2.5
2.5
0.30
Units
V
V
V
V
V
µA
µA
µA
V
µA
µA
mA
µA
µA
µA
mA
µA
mA
mA
mA
mA/
MHz
VCC Conditions
Recognized HIGH Signal
Recognized LOW Signal
Min IIN = −18 mA
Min IOH = −3 mA
Min IOH = −32 mA
IOL = 64 mA
Max
VIN = 2.7V (Note 3)
VIN = VCC
Max VIN = 7.0V
Max VIN = 0.5V (Note 3)
VIN = 0.0V
0.0 IID = 1.9 µA
All Other Pins Grounded
0 5.5V
0 5.5V
Max
Max
0.0
Max
Max
VOUT = 2.7V; OE = 2.0V
VOUT = 0.5V; OE = 2.0V
VOUT = 0.0V
VOUT = VCC
VOUT = 5.5V; All Other GND
All Outputs HIGH
All Outputs LOW
Max
Max
Max
OE = VCC
All Others at VCC or GND
VI = VCC 2.1V
Enable Input VI = VCC 2.1V
Data Input VI = VCC 2.1V
All Others at VCC or GND
Outputs Open, OE = GND,
One Bit Toggling (Note 4),
50% Duty Cycle
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