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74ABT651DB PDF даташит

Спецификация 74ABT651DB изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «Octal transceiver/register/ inverting 3-State».

Детали детали

Номер произв 74ABT651DB
Описание Octal transceiver/register/ inverting 3-State
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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74ABT651DB Даташит, Описание, Даташиты
Philips Semiconductors
Octal transceiver/register, inverting (3-State)
Product specification
74ABT651
FEATURES
Independent registers for A and B buses
The 74ABT651 is the inverting version of the 74ABT652
Multiplexed real-time and stored data
3-State outputs
Live insertion/extraction permitted.
Power-up 3-State
Power-up reset
Output capability: +64mA/–32mA
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT651 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT651 transceiver/register consists of bus transceiver
circuits with 3-State outputs, D-type flip-flops, and control circuitry
arranged for multiplexed transmission of data directly from the input
bus or the internal registers. Data on the A or B bus will be clocked
into the registers as the appropriate clock pin goes High. Output
Enable (OEAB, OEBA) and Select (SAB, SBA) pins are provided for
bus management.
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the
74ABT651.
The select pins determine whether data is stored or transferred
through the device in real time.
The output enable pins determine the direction of the data flow.
QUICK REFERENCE DATA
SYMBOL
tPLH
tPHL
CIN
CI/O
ICCZ
PARAMETER
Propagation delay
CPBA to An or CPAB to Bn
Input capacitance
I/O capacitance
Total supply current
CONDITIONS
Tamb = 25°C; GND = 0V
CL = 50pF; VCC = 5V
VI = 0V or VCC
Outputs disabled; VO = 0V or VCC
Outputs disabled; VCC =5.5V
TYPICAL
3.8
4.4
4
7
110
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +85°C
74ABT651 N
–40°C to +85°C
74ABT651 D
–40°C to +85°C
74ABT651 DB
–40°C to +85°C
74ABT651 PW
NORTH AMERICA
74ABT651 N
74ABT651 D
74ABT651 DB
74ABT651PW DH
DWG NUMBER
SOT222-1
SOT137-1
SOT340-1
SOT355-1
PIN CONFIGURATION
CPAB 1
SAB 2
OEAB 3
A0 4
A1 5
A2 6
A3 7
A4 8
A5 9
A6 10
A7 11
GND 12
24 VCC
23 CPBA
22 SBA
21 OEBA
20 B0
19 B1
18 B2
17 B3
16 B4
15 B5
14 B6
13 B7
SA00094
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1, 23
2, 22
CPAB /
CPBA
SAB /
SBA
A to B clock input / B to A clock input
A to B select input / B to A select input
3, 21
OEAB /
OEBA
A to B Output Enable input /
B to A Output Enable input
(active–Low)
4, 5, 6, 7, 8,
9, 10, 11
A0 – A7 Data inputs/outputs (A side)
20, 19, 18,
17, 16, 15,
14, 13
B0 – B7 Data inputs/outputs (B side)
12 GND Ground (0V)
24 VCC Positive supply voltage
1995 Sep 06
1 853-1783 15703









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74ABT651DB Даташит, Описание, Даташиты
Philips Semiconductors
Octal transceiver/register, inverting (3-State)
Product specification
74ABT651
LOGIC SYMBOL (IEEE/IEC)
21 EN1 [BA]
3 EN2 [AB]
23 C4
22 G5
1 C6
2 G7
4
w1 5 4D
20
ʼn1 5 1
6D 7
17
w1
2ʼn
5 19
6 18
7 17
8 16
9 15
10 14
11 13
SA00125
REAL TIME BUS TRANSFER
BUS B TO BUS A
REAL TIME BUS TRANSFER
BUS A TO BUS B
LOGIC SYMBOL
4 5 6 7 8 9 10 11
A0 A1 A2 A3 A4 A5 A6 A7
23 CPBA
22 SBA
2 SAB
1 CPAB
OEAB
OEBA
3
21
B0 B1 B2 B3 B4 B5 B6 B7
20 19 18 17 16 15 14 13
SA00095
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED DATA
TO A OR B
A BA
BA
BA
B
OEABOEBA CPAB CPBA SAB SBA
LLXXXL
OEABOEBA CPAB CPBA SAB SBA
HHX X L X
OEABOEBA CPAB CPBA SAB SBA
XH XXX
LXXXX
LH↑ ↑XX
OEABOEBA CPAB CPBA SAB SBA
H L H|L H|L H H
SA00097
1995 Sep 06
2









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74ABT651DB Даташит, Описание, Даташиты
Philips Semiconductors
Octal transceiver/register, inverting (3-State)
Product specification
74ABT651
FUNCTION TABLE
OEAB
OEBA
INPUTS
CPAB CPBA
SAB SBA
DATA I/O
An Bn
OPERATING MODE
L
L
H
H or L H or L
X
X
H ↑ ↑ XX
Input
Input
Isolation
Store A and B data
X
H
H
H
H or L
X
**
X
X
Input
Unspecified
output*
Store A, Hold B
Store A in both registers
L
L
X H or L
L↑↑
X
X
X Unspecified
** output*
Input
Hold A, Store B
Store B in both registers
L
L
L
L
X
X
X
H or L
X
X
L
H
Output
Input
Real time B data to A bus
Stored B data to A bus
H
H
HXX
H H or L X
LX
HX
Input
Output
Real time A data to B bus
Store A data to B bus
H
L
H or L H or L
H
H
Output
Output
Stored A data to B bus
Stored B data to A bus
H=
L=
X=
=
*
**
High voltage level
Low voltage level
Don’t care
Low-to-High clock transition
The data output function may be enabled or disabled by various signals at the OEBA and OEAB inputs. Data input functions are always
enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
If both Select controls (SAB and SBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be
staggered in order to load both registers.
LOGIC DIAGRAM
OEBA
OEAB
CPBA
SBA
CPAB
SAB
21
3
23
22
1
2
4
A0
1of 8 Channels
1D
C1
Q
1D
C1
Q
20
B0
5
A1
6
A2
7
A3
8
A4
9
A5
10
A6
11
A7
1995 Sep 06
DETAIL A X 7
3
19
B1
18
B2
17
B3
16
B4
15
B5
14
B6
13
B7
SA00098










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