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PDF 74ABT899DB Data sheet ( Hoja de datos )
| Número de pieza | 74ABT899DB | |
| Descripción | 9-bit dual latch transceiver with 8-bit parity generator/checker 3-State | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
74ABT899
9-bit dual latch transceiver with 8-bit
parity generator/checker (3-State)
Product specification
Supersedes data of 1993 Oct 04
IC23 Data Handbook
1998 Jan 16
Philips
Semiconductors
1 page  
Philips Semiconductors
9-bit dual latch transceiver with 8-bit parity
generator/checker (3-State)
Product specification
74ABT899
PARITY AND ERROR FUNCTION TABLE
INPUTS
OUTPUTS
SEL
ODD/EVEN
xPAR Σ of High xPAR
(A or B) Inputs (B or A)
ERRt
H
H
H
Even
Odd
H
H
H
H
L
Even
Odd
L
L
H
L
H
Even
Odd
H
H
H
L
L
Even
Odd
L
L
L
H
H
Even
Odd
H
L
L
H
L
Even
Odd
H
L
L
L
H
Even
Odd
L
H
L
L
L
Even
Odd
L
H
H = High voltage level
L = Low voltage level
t = Transmit–if the data path is from A→B then ERRt is ERRA
r = Receive–if the data path is from A→B then ERRr is ERRB
* Blocked if latch is not transparent
H
L
L
H
L
H
H
L
H
L
L
H
L
H
H
L
ERRr*
H
L
L
H
L
H
H
L
H
H
H
H
H
H
H
H
Odd
Mode
PARITY MODES
Feed-through/check parity
Even
Mode
Odd
Mode
Even
Mode
Generate parity
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
VCC DC supply voltage
–0.5 to +7.0
V
IIK DC input diode current
VI DC input voltage3
VI < 0
–18
–1.2 to +7.0
mA
V
IOK DC output diode current
VO < 0
–50 mA
VOUT
DC output voltage3
output in Off or High state
–0.5 to +5.5
V
IOUT
DC output current
output in Low state
128 mA
Tstg Storage temperature range
–65 to 150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 1505C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Jan 16
5
5 Page 
Philips Semiconductors
9-bit dual latch transceiver with 8-bit parity
generator/checker (3-State)
Product specification
74ABT899
ODD/EVEN
1
APAR
(BPAR)
0
An
(Bn)
EVEN PARITY
INPUT
SEL
BPAR
(APAR)
VM VM
tPLH
tPHL
VM VM
INPUT
OUTPUT
NOTE: Only even parity mode is shown with even parity. Odd parity mode would cause inverted output
and odd parity mode would be with ODD/EVEN = 1
SA00300
Waveform 8. Propagation Delay, SEL to BPAR or SEL to APAR
1
SEL
APAR, An]
(BPAR, Bn)
INPUT
LEA
(LEB)
VM
VM INPUT
Bn, BPAR
(An, APAR)
tPLH
VM
tPHL
VM
OUTPUT
SA00301
Waveform 9. Propagation Delay, LEA to BPAR or LEB to APAR, LEA to Bn or LEB to An
ÉÉÉAPAR, BPAR,
ÉÉÉÉÉÉAn, Bn
VM
ts(H)
VMÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉVÉÉÉM ÉÉÉÉÉÉVÉÉÉM ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
th(H)
ts(L)
th(L)
LEA, LEB
VM VM tw(H) VM
The shaded areas indicate when the input is permitted to change for predictable output performance.
SA00302
Waveform 10. Data Setup and Hold Times, Pulse Width High
1998 Jan 16
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet 74ABT899DB.PDF ] | |
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