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74AC14MTC PDF даташит

Спецификация 74AC14MTC изготовлена ​​​​«Fairchild Semiconductor» и имеет функцию, называемую «Hex Inverter with Schmitt Trigger Input».

Детали детали

Номер произв 74AC14MTC
Описание Hex Inverter with Schmitt Trigger Input
Производители Fairchild Semiconductor
логотип Fairchild Semiconductor логотип 

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74AC14MTC Даташит, Описание, Даташиты
74AC14 • 74ACT14
Hex Inverter with Schmitt Trigger Input
November 1988
Revised September 2005
General Description
The 74AC14 and 74ACT14 contain six inverter gates each with
a Schmitt trigger input. They are capable of transforming slowly
changing input signals into sharply defined, jitter-free output sig-
nals. In addition, they have a greater noise margin than conven-
tional inverters.
The 74AC14 and 74ACT14 have hysteresis between the posi-
tive-going and negative-going input thresholds (typically 1.0V)
which is determined internally by transistor ratios and is essen-
tially insensitive to temperature and supply voltage variations.
Features
O ICC reduced by 50%
O Outputs source/sink 24 mA
O 74ACT14 has TTL-compatible inputs
Ordering Code:
Order Number
74AC14SC
74AC14SCX_NL
(Note 1)
74AC14SJ
74AC14MTC
74AC14MTCX_NL
(Note 1)
74AC14PC
74ACT14SC
74ACT14MTC
74ACT14MTCX_NL
(Note 1)
74ACT14PC
Package
Number
M14A
M14A
M14D
MTC14
MTC14
N14A
M14A
MTC14
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
FACT¥ is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS009917
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74AC14MTC Даташит, Описание, Даташиты
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
In
On
Description
Inputs
Outputs
Function Table
Input
A
L
H
Output
O
H
L
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74AC14MTC Даташит, Описание, Даташиты
Absolute Maximum Ratings(Note 2)
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI 0.5V
VI VCC  0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VO 0.5V
VO VCC  0.5V
DC Output Voltage (VO)
DC Output Source
or Sink Current (IO)
DC VCC or Ground Current
per Output Pin (ICC or IGND)
Storage Temperature (TSTG)
Junction Temperature (TJ)
PDIP
0.5V to 7.0V
20 mA
20 mA
0.5V to VCC  0.5V
20 mA
20 mA
0.5V to VCC  0.5V
r50 mA
r50 mA
65qC to 150qC
140qC
DC Electrical Characteristics for AC
Recommended Operating
Conditions
Supply Voltage (VCC)
AC
ACT
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
2.0V to 6.0V
4.5V to 5.5V
0V to VCC
0V to VCC
40qC to 85qC
Note 2: Absolute maximum ratings are those values beyond which damage to the
device may occur. The databook specifications should be met, without exception, to
ensure that the system design is reliable over its power supply, temperature, and out-
put/input loading variables. Fairchild does not recommend operation of FACT¥ cir-
cuits outside databook specifications.
Symbol
VOH
Parameter
Minimum HIGH Level
Output Voltage
VOL Maximum LOW Level
Output Voltage
IIN (Note )
Vt
Vt
VH(MAX)
VH(MIN)
IOLD
IOHD
ICC
(Note )
Maximum Input Leakage Current
Maximum Positive
Threshold
Minimum Negative
Threshold
Maximum Hysteresis
Minimum Hysteresis
Minimum Dynamic
Output Current (Note )
Maximum Quiescent
Supply Current
VCC
TA 25qC
TA 40qC to 85qC
Units
(V) Typ
Guaranteed Limits
Conditions
3.0 2.99 2.9
2.9
IOUT 50 PA45
4.5 4.49 4.4 4.4 V
5.5 5.49 5.4
5.4
3.0 2.56
4.5 3.86
5.5 4.86
3.0 0.002 0.1
4.5 0.001 0.1
2.46
3.76
4.76
0.1
0.1
IOH 12
V IOH 24 mA
IOH 24 mA (Note )
PIOUT 50 A
V
5.5 0.001 0.1
0.1
3.0
0.36
0.44
IOL 12
4.5
0.36
0.44
V IOL 24 mA
5.5
0.36
0.44
IOL 24 mA (Note )
5.5 r0.1 r1.0 PA VI VCC, GND
3.0
2.2 2.2
TA Worst Case
4.5 3.2 3.2 V
5.5 3.9 3.9
3.0
0.5 0.5
TA Worst Case
4.5 0.9 0.9 V
5.5 1.1 1.1
3.0
1.2 1.2
TA Worst Case
4.5 1.4 1.4 V
5.5 1.6 1.6
3.0
0.3 0.3
TA Worst Case
4.5 0.4 0.4 V
5.5 0.5 0.5
5.5 75 mA VOLD 1.65V Max
5.5 75 mA VOHD 3.85V Min
P5.5 2.0 20.0 A VIN VCC
or GND
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
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