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PDF 74AC191MTC Data sheet ( Hoja de datos )

Número de pieza 74AC191MTC
Descripción Up/Down Counter with Preset and Ripple Clock
Fabricantes Fairchild Semiconductor　
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! 74AC191MTC Hoja de datos, Descripción, Manual

November 1988
Revised November 1999
74AC191
Up/Down Counter with Preset and Ripple Clock
General Description
The AC191 is a reversible modulo 16 binary counter. It fea-
tures synchronous counting and asynchronous presetting.
The preset feature allows the AC191 to be used in pro-
grammable dividers. The Count Enable input, the Terminal
Count output and the Ripple Clock output make possible a
variety of methods of implementing multistage counters. In
the counting modes, state changes are initiated by the ris-
ing edge of the clock.
Features
s ICC reduced by 50%
s High speed—133 MHz typical count frequency
s Synchronous counting
s Asynchronous parallel load
s Cascadable
s Outputs source/sink 24 mA
Ordering Code:
Order Number Package Number
Package Description
74AC191SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
74AC191SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC191MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC191PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
www.DataSheet4U.com
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
CE
CP
P0–P3
PL
U /D
Q0–Q3
RC
TC
Description
Count Enable Input
Clock Pulse Input
Parallel Data Inputs
Asynchronous Parallel Load Input
Up/Down Count Control Input
Flip-Flop Outputs
Ripple Clock Output
Terminal Count Output
FACTis a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS009940
www.fairchildsemi.com

1 page




74AC191MTC pdf
AC Electrical Characteristics
Symbol
Parameter
fMAX
Maximum Count
Frequency
tPLH Propagation Delay
CP to Qn
tPHL Propagation Delay
CP to Qn
tPLH Propagation Delay
CP to TC
tPHL Propagation Delay
CP to TC
tPLH Propagation Delay
CP to RC
tPHL Propagation Delay
CP to RC
tPLH Propagation Delay
CE to RC
tPHL Propagation Delay
CE to RC
tPLH Propagation Delay
U /D to RC
tPHL Propagation Delay
U /D to RC
tPLH Propagation Delay
U /D to TC
tPHL Propagation Delay
U /D to TC
tPLH Propagation Delay
Pn to Qn
tPHL Propagation Delay
Pn to Qn
tPLH Propagation Delay
PL to Qn
tPHL Propagation Delay
PL to Qn
Note 6: Voltage Range 3.3 is 3.3V ± 0.3V
Voltage Range 5.0 is 5.0V ± 0.5V
VCC
(V)
(Note 6)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
CL = 50 pF
TA = +25°C
Min Typ Max
70 105
90 133
2.0 8.5 15.0
1.5 6.0 11.0
2.5 8.5 14.5
1.5 6.0 10.5
3.5
10.5
18.0
2.5 7.5 12.0
4.0
10.5
17.5
2.5 7.5 12.5
2.5 7.5 12.0
2.0 5.5 9.5
2.5 7.0 11.5
1.5 5.0 8.5
2.5 7.0 12.0
1.5 5.0 8.5
2.0 6.5 11.0
1.5 5.0 8.0
2.5 6.5 12.5
1.5 5.0 9.0
2.5 7.0 12.0
1.5 5.0 8.5
2.0 7.0 11.5
1.5 5.0 8.5
2.0 6.5 11.0
1.5 5.0 8.5
2.5 8.0 13.5
2.0 5.5 9.5
2.5 7.5 13.0
1.5 5.5 9.5
3.5 9.5 14.5
2.0 5.5 9.5
3.0 8.0 13.5
2.0 6.0 10.0
TA = −40°C to +85°C
CL = 50 pF
Min Max
65
85
1.5 16.0
1.5 12.0
2.0 16.0
1.5 11.5
2.5 20.0
1.5 14.0
3.0 19.0
2.0 13.5
2.0 13.5
1.0 10.5
2.0 12.5
1.0 9.5
1.5 13.5
1.0 9.5
1.5 12.5
1.0 9.0
2.0 14.5
1.0 10.0
2.0 13.5
1.0 10.0
1.5 13.5
1.0 9.5
1.5 12.5
1.0 9.5
2.0 15.5
1.0 10.5
1.5 14.5
1.0 10.5
2.5 17.5
1.0 10.5
2.0 15.5
1.5 11.0
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5 www.fairchildsemi.com

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