74AC374 PDF даташит
Спецификация 74AC374 изготовлена «Hitachi Semiconductor» и имеет функцию, называемую «Octal D-Type Flip-Flops with 3-State Output». |
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Детали детали
Номер произв | 74AC374 |
Описание | Octal D-Type Flip-Flops with 3-State Output |
Производители | Hitachi Semiconductor |
логотип |
11 Pages
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HD74AC374/HD74ACT374
Octal D-Type Flip-Flops with 3-State Output
Description
The HD74AC374/HD74ACT374 is a high-speed, low-power octal D-type flip-flop featuring separate D-
type inputs for each flip-flop and 3-state outputs for bus-oriented applications. A buffered Clock (CP) and
Output Enable (OE) are common to all flip-flops.
Features
• Buffered Positive Edge-Triggered Clock
• 3-State Outputs for Bus-Oriented Applications
• Outputs Source/Sink 24 mA
• See HD74AC273/HD74ACT273 for Reset Version
• See HD74AC373/HD74ACT373 for Transpwawrwe.DnattaSLheaett4cUh.comVersion
• See HD74AC574/HD74ACT574 for Broadside Pinout Version
• See HD74AC564/HD74ACT564 for Broadside
• Pinout Version with Inverted Outputs
• HD74ACT374 has TTL-Compatible Inputs
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HD74AC374/HD74ACT374
Pin Arrangement
Logic Symbol
OE 1
O0 2
D0 3
D1 4
O1 5
O2 6
D2 7
D3 8
O3 9
Gnd 10
(Top view)
20 VCC
19 O7
18 D7
17 D6
16 O6
15 O5
14 D5
13 D4
12 O4
11 CP
D0 D1 D2 D3 D4 D5 D6 D7
CP
OE
O0 O1 O2 O3 O4 O5 O6 O7
Pin Names
D0 – D7
CP
OE
O0 – O7
Data Inputs
Clock Pulse Input
3-State Output Enable Input
3-State Outputs
2
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HD74AC374/HD74ACT374
Functional Description
The HD74AC374/HD74ACT374 consists of eight edge-triggered flip-flops with individual D-type inputs
and 3-state true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The
eight flip-flops will store the state of their individual D inputs that meet the setup and hold time
requirements on the Low-to-High Clock (CP) transition. With the Output Enable (OE) Low, the contents
of the eight flip-flops are available at the outputs. When the OE is High, the outputs go to the high
impedance state. Operation of the OE input does not affect the state of the flip-flops.
Truth Table
Inputs
Dn CP
H
L
XX
H : High Voltage Level
L : Low Voltage Level
X : Immaterial
Z : High Impedance
: Low-to-High Transition
OE
L
L
H
Outputs
On
H
L
Z
Logic Diagram
D0 D1 D2 D3 D4 D5 D6 D7
CP
CP D
QQ
CP D
QQ
CP D
QQ
CP D
QQ
CP D
QQ
CP D
QQ
CP D
QQ
CP D
QQ
OE
O0 O1 O2 O3 O4 O5 O6 O7
Please note that this diagram is provided only for the understanding of logic operations and should not be
used to estimate propagation delays.
3
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DataSheet26.com | 2020 | Контакты | Поиск |