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Número de pieza | 74AC74 | |
Descripción | DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR | |
Fabricantes | STMicroelectronics | |
Logotipo | ||
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DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
s HIGH SPEED:
fMAX = 300 MHz (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA = 25 oC
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
BM
s 50Ω TRANSMISSION LINE DRIVING
(Plastic Package)
(Micro Package)
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24 mA (MIN)
ORDER CODES :
74AC74B
74AC74M
s BALANCED PROPAGATION DELAYS:
A signal on the D INPUT is transferred to the Q
tPLH ≅ tPHL
OUTPUT during the positive going transition of
s OPERATING VOLTAGE RANGE:
the clock pulse.
VCC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 74
s IMPROVED LATCH-UP IMMUNITY
CLEAR and PRESET are independent of the
clock and accomplished by a low setting on the
appropriate input.
It is ideal for low power applications mantaining
DESCRIPTION
The AC74 is an
advanced
high-speed
high speed operation similar to equivalent Bipolar
CMwOwwS.DataSheet4SU.ccohm ottky TTL.
OCTAL D-TYPE FLIP FLOP WITH PRESET AND All inputs and outputs are equipped with
CLEAR NON INVERTING fabricated with protection circuits against static discharge, giving
sub-micron silicon gate and double-layer metal them 2KV ESD immunity and transient excess
wiring C2MOS technology.
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 1997
1/11
1 page 74AC74
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf =3 ns)
Symbol
P ar ame te r
tPLH Propagation Delay Time
tPHL CK to Q
tPLH Propagation Delay Time
tPHL PR or CLR to Q
tw Pulse Width HIGH or
LOW, CK or PR or CLR
ts Setup Time D to CK
HIGH or LOW
th Hold Time D to CK
HIGH or LOW
tREM Removal Time
PR or CLR to CK
fMAX Maximum Clock
Frequency
(*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5V ± 0.5V
Test Condition
V CC
(V)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
Value
TA = 25 oC
-40 to 85 oC
Min. Typ. Max. Min. Max.
7 13
14
5 10
11
6 12
13
4.5 9
10
1.5 5
7
1.5 4
5
-0.2 4
4
-0.2 3
3
0.2 2
3
0.2 2
3
-1 1
1
-0.7 1
1
100 300
90
140 300
130
Unit
ns
ns
ns
ns
ns
ns
MHz
CAPACITIVE CHARACTERISTICS
Symbol
P ar ame te r
Test Conditions
V CC
(V)
Value
TA = 25 oC
-40 to 85 oC
Min. Typ. Max. Min. Max.
Unit
CIN Input Capacitance
5.0
4 pF
CPD Power Dissipation
Capacitance (note 1)
5.0
35 pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to
Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/n (per circuit)
5/11
5 Page 74AC74
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
© 1997 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A
.
11/11
11 Page |
Páginas | Total 11 Páginas | |
PDF Descargar | [ Datasheet 74AC74.PDF ] |
Número de pieza | Descripción | Fabricantes |
74AC74 | DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR | STMicroelectronics |
74AC74 | Dual D-Type Positive Edge-Triggered Flip-Flop | Fairchild Semiconductor |
74AC74 | DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP | ON Semiconductor |
74AC74 | Dual D-Type Positive Edge-Triggered Flip-Flop | Fairchild Semiconductor |
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