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74ACT16240 PDF даташит

Спецификация 74ACT16240 изготовлена ​​​​«Fairchild Semiconductor» и имеет функцию, называемую «16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs».

Детали детали

Номер произв 74ACT16240
Описание 16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs
Производители Fairchild Semiconductor
логотип Fairchild Semiconductor логотип 

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74ACT16240 Даташит, Описание, Даташиты
August 1999
Revised May 2005
74ACT16240
16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs
General Description
The ACT16240 contains sixteen inverting buffers with
3-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus-oriented transmit-
ter/receiver. The device is nibble controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
Features
s Separate control logic for each byte
s 16-bit version of the ACT240
s Outputs source/sink 24 mA
s TTL-compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74ACT16240SSC
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74ACT16240MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
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Pin Descriptions
Pin Names
Description
OEn
I0I15
O0O15
Output Enable Inputs (Active LOW)
Inputs
Outputs
FACT¥ is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation DS500293
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74ACT16240 Даташит, Описание, Даташиты
Truth Tables
Inputs
OE1
I0–I3
LL
LH
HX
Outputs
O0–O3
H
L
Z
Inputs
OE2
I4–I7
LL
LH
HX
Inputs
OE3
L
L
H
I8–I11
L
H
X
Outputs
O8–O11
H
L
Z
Inputs
OE4
L
L
H
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial
Z High Impedance
I12–I15
L
H
X
Functional Description
The ACT16240 contains sixteen inverting buffers with
3-STATE standard outputs. The device is nibble (4 bits)
controlled with each nibble functioning identically, but inde-
pendently of the other. The control pins may be shorted
together to obtain full 16-bit operation. The 3-STATE out-
puts are controlled by an Output Enable (OEn) input for
each nibble. When OEn is LOW, the outputs are in 2-state
mode. When OEn is HIGH, the outputs are in the high
impedance mode, but this does not interfere with entering
new data into the inputs.
Logic Diagram
Outputs
O4–O7
H
L
Z
Outputs
O12–O15
H
L
Z
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74ACT16240 Даташит, Описание, Даташиты
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI 0.5V
VI VCC  0.5V
DC Output Diode Current (IOK)
VO 0.5V
VO VCC  0.5V
DC Output Voltage (VO)
DC Output Source/Sink Current (IO)
DC VCC or Ground Current
per Output Pin
Junction Temperature
Storage Temperature
0.5V to 7.0V
20 mA
20 mA
20 mA
20 mA
0.5V to VCC  0.5V
r 50 mA
r 50 mA
140qC
65qC to 150qC
Recommended Operating
Conditions
Supply Voltage (VCC)
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
Minimum Input Edge Rate ('V/'t)
4.5V to 5.5V
0V to VCC
0V to VCC
40qC to 85qC
125 mV/ns
VIN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT¥ circuits outside databook specifications.
DC Electrical Characteristics
Symbol
Parameter
VIH Minimum HIGH
Input Voltage
VIL Maximum LOW
Input Voltage
VOH Minimum HIGH
Output Voltage
VCC TA 25qC TA 40qC to 85qC
(V) Typ
Guaranteed Limits
4.5 1.5
2.0
2.0
5.5 1.5
2.0
2.0
4.5 1.5
0.8
0.8
5.5 1.5
0.8
0.8
4.5 4.49
4.4
4.4
5.5 5.49
5.4
5.4
VOL Maximum LOW
Output Voltage
4.5
5.5
4.5 0.001
5.5 0.001
3.86
4.86
0.1
0.1
3.76
4.76
0.1
0.1
4.5
5.5
IOZ Maximum 3-STATE
Leakage Current
5.5
IIN Maximum Input Leakage Current
5.5
ICCT
Maximum ICC/Input
5.5 0.6
ICC Max Quiescent Supply Current
5.5
IOLD
IOHD
Minimum Dynamic
Output Current (Note 3)
5.5
Note 2: All outputs loaded; thresholds associated with output under test.
Note 3: Maximum test duration 2.0 ms; one output loaded at a time.
0.36
0.36
r0.5
r 0.1
8.0
0.44
0.44
r5.0
r 1.0
1.5
80.0
75
75
Units
Conditions
V VOUT 0.1V
or VCC  0.1V
V VOUT 0.1V
or VCC  0.1V
V IOUT 50 PA
VIN VIL or VIH
V IOH 24 mA
IOH 24 mA (Note 2)
V IOUT 50 PA
VIN VIL or VIH
V IOL 24 mA
IOL 24 mA (Note 2)
PA VI VIL, VIH
VO VCC, GND
PA VI VCC, GND
mA VI VCC  2.1V
PA VIN VCC or GND
mA VOLD 1.65V Max
mA VOHD 3.85V Min
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