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Спецификация 6812 изготовлена «Allegro MicroSystems» и имеет функцию, называемую «DABiC-IV/ 20-BIT SERIAL-INPUT/ LATCHED SOURCE DRIVER». |
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Детали детали
Номер произв | 6812 |
Описание | DABiC-IV/ 20-BIT SERIAL-INPUT/ LATCHED SOURCE DRIVER |
Производители | Allegro MicroSystems |
логотип |
10 Pages
No Preview Available ! |
6812
A6812xA
LOAD
SUPPLY
1
VBB
SERIAL
DATA OUT
2
OUT20 3
OUT19 4
OUT18 5
OUT 17 6
OUT 16 7
OUT15 8
OUT14 9
OUT13 10
OUT12 11
OUT11 12
BLANKING 13 BLNK
GROUND 14
VDD
28
LOGIC
SUPPLY
27
SERIAL
DATA IN
26 OUT 1
25 OUT 2
24 OUT 3
23 OUT 4
22 OUT5
21 OUT 6
20 OUT7
19 OUT8
18 OUT9
17 OUT 10
ST 2186 STROBE
CLK 2175 CLOCK
Dwg. PP-029-7
ABSOLUTE MAXIMUM RATINGS
at TA = 25°C
Logic Supply Voltage, VDD ................... 7.0 V
Driver Supply Voltage, VBB ................... 60 V
Continuous Output Current Range,
IOUT ......................... -40 mA to +15 mA
Input Voltage Range,
VIN ....................... -0.3 V to VDD + 0.3 V
Package Power Dissipation,
PD ........................................ See Graph
Operating Temperature Range, TA
(Suffix ‘E–’) .................. -40°C to +85°C
(Suffix ‘S–’) .................. -20°C to +85°C
Storage Temperature Range,
TS ............................... -55°C to +125°C
Caution: These CMOS devices have input static
protection (Class 2) but are still susceptible to
damage if exposed to extremely high static
electrical charges.
DABiC-IV, 20-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVER
The A6812– devices combine a 20-bit CMOS shift register,
accompanying data latches and control circuitry with bipolar sourcing
outputs and pnp active pull downs. Designed primarily to drive
vacuum-fluorescent displays, the 60 V and -40 mA output ratings also
allow these devices to be used in many other peripheral power driver
applications. The A6812– features an increased data input rate (com-
pared with the older UCN/UCQ5812-F) and a controlled output slew
rate.
The CMOS shift register and latches allow direct interfacing with
microprocessor-based systems. With a 3.3 V or 5 V logic supply, they
will operate to at least 10 MHz.
A CMOS serial data output permits cascade connections in applica-
tions requiring additional drive lines. Similar devices are available as
the A6809– and A6810– (10 bits), A6811– (12 bits), and A6818– (32
bits).
The A6812– output source drivers are npn Darlingtons, capable of
sourcing up to 40 mA. The controlled output slew rate reduces electro-
magnetic noise, which is an important consideration in systems that
include telecommunications and/or microprocessors and to meet
government emissions regulations. For inter-digit blanking, all output
drivers can be disabled and all sink drivers turned on with a BLANK-
ING input high. The pnp active pull-downs will sink at least 2.5 mA.
Two temperature ranges are available for optimum performance in
commercial (suffix S-) or industrial (suffix E-) applications. Package
styles are provided for through-hole DIP (suffix -A), surface-mount
SOIC (suffix -LW), or minimum-area surface-mount PLCC (suffix
-EP). Copper lead frames, low logic-power dissipation, and low
output-saturation voltages allow these drivers to source 25 mA from all
outputs continuously to more than +43°C (suffix -LW), +61°C (suffix
-EP), or +77°C (suffix -A).
FEATURES
I Controlled Output Slew Rate I Low Output-Saturation Voltages
I High-Speed Data Storage I Low-Power CMOS Logic
I 60 V Minimum
and Latches
Output Breakdown
I Improved Replacements
I High Data Input Rate
for TL5812–, UCN5812–,
I PNP Active Pull-Downs
and UCQ5812–
Complete part number includes a suffix to identify operating
temperature range (E- or S-) and package type (-A, -EP, or -LW).
Always order by complete part number, e.g., A6812SLW .
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6812
20-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVER
A6812xEP
OUT18 5
6
7
8
9
10
OUT12 11
25 OUT 2
24
23
22
21
20
19 OUT8
TYPICAL INPUT CIRCUIT
VDD
Dwg. PP-059-1
IN
Dwg. EP-010-5
TYPICAL OUTPUT DRIVER
V BB
OUTN
Dwg. EP-021-19
A6812xLW
LOAD
SUPPLY
1
VBB
SERIAL
DATA OUT
2
OUT20 3
OUT19 4
OUT18 5
OUT 17 6
OUT 16 7
OUT15 8
OUT14 9
OUT13 10
OUT12 11
OUT11 12
BLANKING 13 BLNK
GROUND 14
VDD
28
LOGIC
SUPPLY
27
SERIAL
DATA IN
26 OUT 1
25 OUT 2
24 OUT 3
23 OUT 4
22 OUT5
21 OUT 6
20 OUT7
19 OUT8
18 OUT9
17 OUT 10
ST 1268 STROBE
CLK 1257 CLOCK
Dwg. PP-029-8
2.5
2.0 SUFFIX 'EP', R
1.5
θJA =
SUFFIX 'LW',
55°C/W
R
1.0 θJA = 66°C/W
0.5
0
25
50 75 100 125
AMBIENT TEMPERATURE IN °C
150
Dwg. GP-024-2
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 2000, Allegro MicroSystems, Inc.
No Preview Available ! |
6812
20-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVER
CLOCK
SERIAL
DATA IN
STROBE
BLANKING
GROUND
FUNCTIONAL BLOCK DIAGRAM
SERIAL-PARALLEL SHIFT REGISTER
LATCHES
V DD
LOGIC
SUPPLY
SERIAL
DATA OUT
OUT 1 OUT 2 OUT 3
MOS
BIPOLAR
VBB
LOAD
SUPPLY
OUT N
Dwg. FP-013-1
TRUTH TABLE
Serial
Shift Register Contents
Data Clock
Input Input I1 I2 I3 ... IN-1 IN
Serial
Data Strobe
Output Input
Latch Contents
Output Contents
I1 I2 I3 ... IN-1 IN Blanklng I1 I2 I3 ... IN-1 IN
H H R1 R2 ... RN-2 RN-1 RN-1
L L R1 R2 ... RN-2 RN-1 RN-1
X
R1 R2 R3 ... RN-1 RN
RN
X X X ... X X
X
L R1 R2 R3 ... RN-1 RN
P1 P2 P3 ... PN-1 PN
PN
H P1 P2 P3 ... PN-1 PN
X X X ... X X
L = Low Logic Level H = High Logic Level X = Irrelevant P = Present State R = Previous State
L
H
P1 P2 P3 ... PN-1 PN
L L L ... L L
www.allegromicro.com
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