S524LB0X91 PDF даташит
Спецификация S524LB0X91 изготовлена «Samsung semiconductor» и имеет функцию, называемую «32K/64K-bit Serial EEPROM». |
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Детали детали
Номер произв | S524LB0X91 |
Описание | 32K/64K-bit Serial EEPROM |
Производители | Samsung semiconductor |
логотип |
20 Pages
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S524LB0X91/B0XB1
32K/64K-bit
Serial EEPROM
Data Sheet
OVERVIEW
The S524LB0D91/B0DB1 serial EEPROM has a 32/64 Kbits (4,096/8,192 bytes) capacity, supporting the
standard I2C™-bus serial interface. It is fabricated using Samsungs’ most advanced CMOS technology. One of
its major features is a hardware-based write protection circuit for the entire memory area. Hardware-based write
protection is controlled by the state of the write-protect (WP) pin. Using one-page write mode, you can load up to
32 bytes of data into the EEPROM in a single write operation. Another significant feature of the
S524LB0D91/B0DB1 is its support for fast mode and standard mode.
FEATURES
I2C-Bus Interface
• Two-wire serial interface
• Automatic word address increment
EEPROM
• 32/64 Kbits (4,096/8,192 bytes) storage area
• 32-byte page buffer
• Typical 3-millisecond write cycle time with auto-
erase function
• Hardware-based write protection for the entire
EEPROM (using the WP pin)
• EEPROM programming voltage generated
on chip
• 1,000,000 erase/write cycles
• 100 years data retention
Operating Characteristics
• Operating voltage: 2.0 V to 5.5 V
• Operating current
— Maximum write current: < 3 mA at 5.5 V
— Maximum read current: < 500 µA at 5.5 V
— Maximum stand-by current: < 2 µA at 2.0 V
• Operating temperature range:
— – 25 °C to + 70 °C (Commercial)
— – 40 °C to + 85 °C (Industrial)
• Operating clock frequencies
— 100 kHz at standard mode
— 400 kHz at fast mode
• Electrostatic discharge (ESD)
— 5,000 V (HBM)
— 500 V (MM)
Packages
• 8-pin DIP and SOP
7-1
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S524LB0D91/B0DB1 SERIAL EEPROM
DATA SHEET
SDA
WP
SCL
A0
A1
A2
Start/Stop
Logic
Slave Address
Comparator
Control Logic
HV Generation
Timing Control
Word Address
Pointer
Row
Decoder
EEPROM
Cell Array
4,096 x 8 Bits
8,192 x 8 Bits
DOUT and ACK
Column Decoder
Data Register
Figure 7-1. S524LB0D91/B0DB1 Block Diagram
7-2
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DATA SHEET
S524LB0D91/B0DB1 SERIAL EEPROM
VCC WP SCL SDA
S524AB0D91/B0DB1
A0 A1 A2 VSS
NOTE: The S524AB0D91/B0DB1 is available in
8-pin DIP, SOP, and TSSOP package.
Figure 7-2. Pin Assignment Diagram
Name
Type
Table 7-1. S524LB0D91/B0DB1 Pin Descriptions
Description
A0, A1, A2
VSS
SDA
SCL
WP
VCC
Input
–
I/O
Input
Input
–
Input pins for device address selection. To configure a device
address, these pins should be connected to the VCC or VSS of the
device.
Ground pin.
Bi-directional data pin for the I2C-bus serial data interface. Schmitt
trigger input and open-drain output. An external pull-up resistor
must be connected to VDD.
Schmitt trigger input pin for serial clock input.
Input pin for hardware write protection control. If you tie this pin to
VCC, the write function is disabled to protect previously written data
in the entire memory; if you tie it to VSS, the write function is
enabled.
Single power supply.
NOTE: See the following page for diagrams of pin circuit types 1, 2, and 3.
Circuit
Number
1
–
3
2
1
–
7-3
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Номер в каталоге | Описание | Производители |
S524LB0X91 | 32K/64K-bit Serial EEPROM | Samsung semiconductor |
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DataSheet26.com | 2020 | Контакты | Поиск |