S5T8803A01-D0B0 PDF даташит
Спецификация S5T8803A01-D0B0 изготовлена «Samsung semiconductor» и имеет функцию, называемую «10 CH PLL». |
|
Детали детали
Номер произв | S5T8803A01-D0B0 |
Описание | 10 CH PLL |
Производители | Samsung semiconductor |
логотип |
8 Pages
No Preview Available ! |
10 CH PLL
INTRODUCTION
The S5T8803A is designed to select 10 channels of a cordless phone,
whose frequency band is 46/49MHz.
It has a reference frequency generator, programmable divider for
Transmit and Receive section, and phase detector.
16−DIP−300A
FEATURES
• Able to select 10 Channels: S5T8803A
(both transmit/receive)
• Include oscillation circuit with external x-tal (10.24MHz)
• 5KHz output for guard tone
• Unlock detector
(phase difference more than 6.25us)
• Standby function for power saving
16−SOP−225
ORDERING INFORMATION
Device
S5T8803A01-D0B0
S5T8803A01-S0B0
Package
16−DIP−300A
16−SOP−225
Operating Temperature
−30°C to +75°C
S5T8803A
1
No Preview Available ! |
S5T8803A
BLOCK DIAGRAM
10 CH PLL
OSCI 16
OSCO 1
PDT 11
TIF 9
VDD
VSS
15 12
REFERENCE
DIVIDER
+ VDD
4 F1
PHASE
DETECTOR (Tx)
PHASE
DETECTOR (Rx)
PROGRAMMABLE
DIVIDER (Tx)
PROGRAMMABLE
DIVIDER (Rx)
DECODER
UNLOCK
DETECTOR
3 56782
SB D0 D1 D2 D3 MODE
13 PDR
14 RIF
+
10 LDT
PIN CONFIGURATION
OSCO 1
16 OSCI
MODE 2
15 VDD
SB 3
14 RIF
F1 4
D0 5
S5T8803A
13 PDR
12 VSS
D1 6
11 PDT
D2 7
10 LDT
D3 8
9 TIF
2
No Preview Available ! |
10 CH PLL
S5T8803A
PIN DESCRIPTION
Pin No
1
2
3
4
5, 6
7, 8
9
10
11
12
13
14
15
16
Symbol
OSCO
MODE
SB
F1
D0, D1
D2, D3
TIF
LDT
PDT
VSS
PDR
RIF
VDD
OSCI
Description
This output generates the reference frequency when it is connected to Pin 16 with the
external OSC, whose frequency is 10.24MHz.
Base/Remote Unit Selection Pin.
“High”: Base Unit
“Low” : Remote Unit
Standby pin. This input controls Tx PLL for reducing the power dissipation
“High”: Normal operation
“Low”: Standby
5KHz output
Channel selection pins
The Combinations of these inputs select one channel among the 10 channels
Input to programmable divider of Tx. AC coupling with VCO
In case of a larger signal, It needs DC−coupling. Minimum input voltage is 0.1 Vrms
Unlocked signal out pin (see output characteristics)
Phase detector output for Tx.
PDT detects the phase error from Tx PLL and its output is connected to the external
low pass filter
This pin is the negative supply of the IC. It is usually grounded
Phase detector output for Rx. PDR detects the phase error from Rx PLL and its output
is connected to the external low pass filter
Input of programmable divider for Rx. AC coupling with VCO
In case of a larger signal (standard CMOS logic), it needs DC coupling.
Minimum input voltage is 0.1Vrms
This pin is the positive supply of the IC
Its reference is VSS, and normally + 3.0V ~ + 5.5V more positive than VSS
X-TAL OSC connection pin
This input generates the reference frequency when it is connected to pin 1 with the
external OSC
ABSOLUTE MAXIMUM RATINGS
Characteristic
Supply voltage
Input Voltage
Power Dissipation
Operating Temperature
Storage Temperature
Symbol
VDD
VI
PD
TOPR
TSTG
Value
−0.5 ~ +6.0
−0.3 ~ VDD + 0.5
350
−30 ~ + 75
−40 ~ + 125
Unit
V
V
mW
°C
°C
3
Скачать PDF:
[ S5T8803A01-D0B0.PDF Даташит ]
Номер в каталоге | Описание | Производители |
S5T8803A01-D0B0 | 10 CH PLL | Samsung semiconductor |
Номер в каталоге | Описание | Производители |
TL431 | 100 мА, регулируемый прецизионный шунтирующий регулятор |
Unisonic Technologies |
IRF840 | 8 А, 500 В, N-канальный МОП-транзистор |
Vishay |
LM317 | Линейный стабилизатор напряжения, 1,5 А |
STMicroelectronics |
DataSheet26.com | 2020 | Контакты | Поиск |