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PDF SCAN18374T Data sheet ( Hoja de datos )
| Número de pieza | SCAN18374T | |
| Descripción | D Flip-Flop with TRI-STATE Outputs | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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September 1998
SCAN18374T
D Flip-Flop with TRI-STATE® Outputs
General Description
The SCAN18374T is a high speed, low-power D-type
flip-flop featuring separate D-type inputs organized into dual
9-bit bytes with byte-oriented clock and output enable control
signals. This device is compliant with IEEE 1149.1 Standard
Test Access Port and BOUNDARY-SCAN Architecture with
the incorporation of the defined BOUNDARY-SCAN test
logic and test access port consisting of Test Data Input (TDI),
Test Data Out (TDO), Test Mode Select (TMS), and Test
Clock (TCK).
Features
n IEEE 1149.1 (JTAG) Compliant
n Buffered positive edge-triggered clock
n TRI-STATE outputs for bus-oriented applications
n 9-bit data busses for parity applications
n Reduced-swing outputs source 24 mA/sink 48 mA (Mil)
n Guaranteed to drive 50Ω transmission line to TTL input
levels of 0.8V and 2.0V
n TTL compatible inputs
n 25 mil pitch Cerpack packaging
n Includes CLAMP and HIGHZ instructions
n Standard Microcircuit Drawing (SMD) 5962-9320701
Connection Diagram
Pin Names
AOE1, BOE1
AO(0–8), BO(0–8)
Description
TRI-STATE Output Enable Inputs
TRI-STATE Outputs
DS100322-1
Pin Names
AI(0–8), BI(0–8)
ACP, BCP
Description
Data Inputs
Clock Pulse Inputs
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100322
www.national.com
1 page  
Description of Boundary-Scan Circuitry (Continued)
Scan Cell TYPE1
Scan Cell TYPE2
DS100322-7
DS100322-8
5 www.national.com
5 Page 
AC Operating Requirements
Scan Test Operation
Symbol
Parameter
VCC
(V)
(Note 8)
Military
TA = −55˚C
to +125˚C
CL = 50 pF
Guaranteed Minimum
Units
tS Setup Time, H or L
Data to TCK (Note 9)
5.0
3.0 ns
tH Hold Time, H or L
TCK to Data (Note 9)
5.0
4.5 ns
tS Setup Time, H or L
AOE1, BOE1 to TCK (Note 11)
tH Hold Time, H or L
TCK to AOE1, BOE1 (Note 11)
tS Setup Time, H or L
Internal AOE, BOE
5.0
5.0
5.0
3.0 ns
4.5 ns
3.0 ns
to TCK (Note 10)
tH Hold Time, H or L
TCK to Internal AOE,
5.0
3.0 ns
BOE (Note 10)
tS Setup Time
ACP, BCP (Note 12) to TCK
5.0
3.0 ns
tH Hold Time
TCK to ACP, BCP (Note 12)
5.0
3.5 ns
tS Setup Time, H or L
TMS to TCK
5.0
8.0 ns
tH Hold Time, H or L
TCK to TMS
5.0
2.0 ns
tS Setup Time, H or L
TDI to TCK
5.0
4.0 ns
tH Hold Time, H or L
TCK to TDI
5.0
4.5 ns
tW Pulse Width TCK
5.0
H
15.0 ns
L 5.0
fmax Maximum TCK
5.0 25 MHz
Clock Frequency
Tpu Wait Time, Power Up
to TCK
5.0
100 ns
Tdn Power Down Delay
0.0
100 ms
Note 8: Voltage Range 5.0 is 5.0V ±0.5V.
All Input Timing Delays involving TCK are measured from the rising edge of TCK.
Note 9: This delay represents the timing relationship between the data Input and TCK at the associated scan cells numbered 0–8, 9–17, 18–26 and 27–35.
Note 10: This delay represents the timing relationship between AOE, BOE and TCK at scan cells 36 and 39 only.
Note 11: Timing pertains to BSR 38 and 41 only.
Note 12: Timing pertains to BSR 37 and 40 only.
11 www.national.com
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| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet SCAN18374T.PDF ] | |
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