PDF SAA5249 Data sheet ( Hoja de datos )

Número de pieza	SAA5249
Descripción	Integrated VIP and Teletext with Background Memory Controller IVT1.1BMCX
Fabricantes	NXP Semiconductors
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No Preview Available ! INTEGRATED CIRCUITS DATA SHEET SAA5249 Integrated VIP and Teletext with Background Memory Controller (IVT1.1BMCX) Preliminary speciﬁcation Supersedes data of December 1993 File under Integrated Circuits, IC02 1996 Nov 07 1 page Philips Semiconductors Integrated VIP and Teletext with Background Memory Controller Preliminary speciﬁcation SAA5249 PIN SYMBOL SOT240-1 SOT319-1(1) DESCRIPTION Y SCL SDA A5 A2 A6 A1 A7 A0 VSS4 A8 A9 RAS R/W D2 D0 SEL2 SEL1 D3 D1 29 62 dot rate character output of teletext foreground colour information; open drain output 30 63 serial clock input for I2C-bus; it can still be driven HIGH during power-down of the device 31 64 serial data port for the I2C-bus; open drain output. It can still be driven HIGH during power-down of the device 32 4 address output to external DRAM for BMCX function 33 5 address output to external DRAM for BMCX function 34 6 address output to external DRAM for BMCX function 35 8 address output to external DRAM for BMCX function 36 9 address output to external DRAM for BMCX function 37 11 address output to external DRAM for BMCX function 38 43 0 V ground 39 13 address output to external DRAM for BMCX function 40 14 address output to external DRAM for BMCX function 41 15 row address select to external DRAM 42 18 read/write for external DRAM 43 19 data input/output for external DRAM 44 20 data input/output for external DRAM 45 21 RAM select input to choose external DRAM size 46 22 RAM select input to choose external DRAM size 47 23 data input/output for external DRAM 48 24 data input/output for external DRAM Note 1. The remaining pins for SOT319 are not connected. 1996 Nov 07 5 5 Page Philips Semiconductors Integrated VIP and Teletext with Background Memory Controller Preliminary speciﬁcation SAA5249 SYMBOL PARAMETER RGBREF note 2 VIL LOW level input voltage ILI input leakage current IDC DC current SEL1 AND SEL2 VIL LOW level input voltage VIH HIGH level input voltage ILI input leakage current SCL VIL LOW level input voltage VIH HIGH level input voltage ILI input leakage current fSCL clock frequency tr input rise time tf input fall time Ci input capacitance Inputs/outputs CRYSTAL OSCILLATOR (OSCIN; OSCOUT) fXTAL Gv Gm Ci CFB crystal frequency small signal voltage gain mutual conductance input capacitance feedback capacitance BLACK Cblk storage capacitor to ground ILI input leakage current SDA VIL LOW level input voltage VIH HIGH level input voltage ILI input leakage current Ci input capacitance tr input rise time tf input fall time VOL LOW level output voltage tf output fall time CL load capacitance CONDITIONS MIN. TYP. MAX. UNIT Vi = 0 to VDD Vi = 0 to VDD Vi = 0 to VDD 10% to 90% 90% to 10% −0.3 − −10 − −− −0.3 − 2.0 − −10 − −0.3 − 3.0 − −10 − 0− −− −− −− VDD + 0.5 +10 10 V µA mA +0.8 V VDD + 0.5 V +10 µA +1.5 V VDD + 0.5 V +10 µA 100 kHz 2 µs 2 µs 10 pF fi = 100 kHz Vi = 0 to VDD Vi = 0 to VDD 10% to 90% 90% to 10% IOL = 3 mA 3 V to 1 V − 27 3.5 − 1.5 − −− −− − 100 −10 − −0.3 − 3.0 − −10 − −− −− −− 0− −− −− − MHz − − mA/V 10 pF 5 pF − nF +10 µA +1.5 V VDD + 0.5 V +10 µA 10 pF 2 µs 2 µs 0.5 V 200 ns 400 pF 1996 Nov 07 11 11 Page

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