|
|
PDF SAA5252 Data sheet ( Hoja de datos )
| Número de pieza | SAA5252 | |
| Descripción | Line twenty-one acquisition and display LITOD | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de SAA5252 (archivo pdf) en la parte inferior de esta página. Total 20 Páginas | ||
|
No Preview Available !
INTEGRATED CIRCUITS
DATA SHEET
SAA5252
Line twenty-one acquisition and
display (LITOD)
Product specification
Supersedes data of March 1995
File under Integrated Circuits, IC02
1996 Jul 18
1 page  
Philips Semiconductors
Line twenty-one acquisition and display (LITOD)
Product specification
SAA5252
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
VDD
VImax
VOmax
Vdif
IIOK
IOmax
Tamb
Tstg
Ves
supply voltage (all supplies)
maximum input voltage (any input)
maximum output voltage (any output)
difference between VSS and OSCGND
DC input or output diode current
maximum output current (each output)
operating ambient temperature
storage temperature
electrostatic handling
human body model
machine model
CONDITIONS
note 1
note 1
note 2
note 3
MIN.
−0.3
−0.3
−
−
−
−
−20
−55
MAX.
UNIT
+6.5 V
VDD + 0.5
VDD + 0.5
±0.25
±20
±10
+70
+125
V
V
V
mA
mA
°C
°C
−2 000
−200
+2 000
+200
V
V
Notes
1. This maximum value has an absolute maximum of 6.5 V independent of VDD.
2. The human body model ESD simulation is equivalent to discharging a 100 pF capacitor via a 1.5 kΩ resistor, which
produces a single discharge transient. Reference “Philips Semiconductors Test Method UZW-BO/FQ-A302 (similar
to MIL-STD 883C method 3015.7)”.
3. The machine model ESD simulation is equivalent to discharging a 200 pF capacitor via a resistor and series inductor
with effective dynamic values of 25 Ω and 2.5 µH, which produces a damped oscillating discharge. Reference
“Philips Semiconductors Test Method UZW-BO/FQ-B302 (similar to EIAJ IC-121 Test Method 20 condition C)”.
Quality
This device will meet the requirements of the “Philips Semiconductors General Quality Specification UZW-BO/FQ-0601”
in accordance with “Quality Reference Handbook (order number 9397 750 00192)”. This details the acceptance criteria
for all Q & R tests applied to the product.
1996 Jul 18
5
5 Page 
Philips Semiconductors
Line twenty-one acquisition and display (LITOD)
Product specification
SAA5252
DISPLAY GENERATOR
General description
The displayed characters are defined on a 5-by-12 matrix
within a 7-by-13 window, allowing one blank pixel either
side of the character and a blank pixel row above. There
are a number of display options available controlled by
Register 1, or external pins in ‘stand-alone’ mode.
The three display modes are video, text and caption, the
device is powered up in the video mode.
The display generator reads the Pre-amble Address Code
(PAC) then the data associated with that row. Each
character is then rounded after which it can be italicized
and/or underlined, depending on the PAC or mid-row
codes, before being passed on to the output circuitry.
Figure 6 shows the character set.
Display of external On-Screen Display (OSD) facilities
The R, G, B and BLAN outputs of the display have the
capability to be put in a 3-state mode allowing other OSD
devices to take control of the television R, G, B and BLAN
signals.
When the BLANIN is held HIGH then the R, G, B and
BLAN outputs from display are disabled and the R, G, B
and BLAN signals come directly from the RGBIN and
BLANIN inputs. This will allow On-Screen Display to be
placed on top of the captioning without any corruption,
leaving the captions intact when the On-Screen Display is
switched off (BLANIN goes LOW). In this form of operation
the RGBIN and RGBOUT pins can be considered
transparent; BLANIN goes through the normal output
buffer to BLAN.
Table 1 Register map (WRITE)
REGISTER
D7
00 DF1/2
01 CLEAR
02 −
03 −
04 −
D6 D5 D4
RGB, BLAN H
+ve/−ve
+ve/−ve
V
+ve/−ve
CH 2/1
NARROW/ ACQ OFF
WIDE
− −−
− − COL4
OSD6
OSD5
OSD4
D3
H3
EN1
ROW3
COL3
OSD3
Table 2 Register map (READ)
REGISTER
D7
80 POR
D6
0
D5
0
D4
0
D3
F1/F2
81 PARITY DATA
ERROR BIT 7
82 PARITY DATA
ERROR BIT 7
DATA
BIT 6
DATA
BIT 6
DATA
BIT 5
DATA
BIT 5
DATA
BIT 4
DATA
BIT 4
D2
H2
EN0
ROW2
COL2
OSD2
D2
EDS
DATA
BIT 3
DATA
BIT 3
D1
H1
M1
ROW1
COL1
OSD1
D0
H0
M0
ROW0
COL0
OSD0
D1
PARITY
SHUTDOWN
DATA
BIT 2
DATA
BIT 2
D0
DATA
READY
DATA
BIT 1
DATA
BIT 1
1996 Jul 18
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet SAA5252.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| SAA5250 | Interface for data acquisition and control for multi-standard teletext systems | NXP Semiconductors |
| SAA5250P | Interface for data acquisition and control for multi-standard teletext systems | NXP Semiconductors |
| SAA5250T | Interface for data acquisition and control for multi-standard teletext systems | NXP Semiconductors |
| SAA5252 | Line twenty-one acquisition and display LITOD | NXP Semiconductors |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |