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PDF SAA5288 Data sheet ( Hoja de datos )
| Número de pieza | SAA5288 | |
| Descripción | TV microcontroller with full screen On Screen Display OSD | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SAA5288 (archivo pdf) en la parte inferior de esta página. Total 48 Páginas | ||
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INTEGRATED CIRCUITS
DATA SHEET
SAA5288
TV microcontroller with full screen
On Screen Display (OSD)
Preliminary specification
File under Integrated Circuits, IC02
1997 Jun 24
1 page  
Philips Semiconductors
TV microcontroller with full screen
On Screen Display (OSD)
6 PINNING INFORMATION
6.1 Pinning
Preliminary specification
SAA5288
1997 Jun 24
handbook, halfpage
P2.0/TPWM 1
52 P1.5
P2.1/PWM0 2
51 P1.4
P2.2/PWM1 3
50 P1.7/SDA
P2.3/PWM2 4
49 P1.6/SCL
P2.4/PWM3 5
48 P1.3/T1
P2.5/PWM4 6
47 P1.2/INT0
P2.6/PWM5 7
46 P1.1/T0
P2.7/PWM6 8
45 P1.0/INT
P3.0/ADC0 9
P3.1/ADC1 10
44 VDDM
43 RESET
P3.2/ADC2 11
42 XTALOUT
P3.3/ADC3 12
41 XTALIN
VSSD 13
P0.0 14
SAA5288
40 OSCGND
39 VDDD
P0.1 15
38 VDDA
P0.2 16
37 VSYNC
P0.3 17
36 HSYNC
P0.4 18
35 VDS
P0.5 19
34 R
P0.6 20
33 G
P0.7 21
32 B
VSSD 22
i.c. 23
31 RGBREF
30 P3.4/PWM7
i.c. 24
29 COR
i.c. 25
IREF 26
28 VSSD
27 FRAME
MGL114
Fig.2 Pin configuration.
5
5 Page 
Philips Semiconductors
TV microcontroller with full screen
On Screen Display (OSD)
Preliminary specification
SAA5288
7.3.7 SOFTWARE ADC
Up to 4 successive approximation ADCs can be
implemented in software by making use of the on-chip 8-bit
DAC and multiplexed voltage comparator. The software
ADC uses 4 analog inputs which are multiplexed with P3.0
to P3.3.
Table 9 ADC input channel selection
CH1
0
0
1
1
CH0
0
1
0
1
INPUT PIN
P3.3/ADC3
P3.0/ADC0
P3.1/ADC1
P3.2/ADC2
The control of the ADC is achieved using the Special
Function Registers SAD and SADB.
SAD.CH1 and SAD.CH0 select one of the four inputs to
pass to the comparator. The other comparator input
comes from the DAC, whose value is set by SAD.SAD7
(MSB) to SAD.SAD4 and SADB.SAD3 to SADB.SAD0
(LSB). The setting of the value SAD.SAD7 to SAD.SAD4
must be performed at least 1 instruction cycle before the
setting of SAD.ST to ensure comparison is made using the
correct SAD.SAD7 to SAD.SAD4 value.
The output of the comparator is SAD.VHI, and is valid after
1 instruction cycle following the setting of SAD.ST to
logic 1.
handbPoo3k.,0halfpage
P3.1
P3.2
MULTIPLEXER
P3.3
ST C1
1D VH1
8-BIT DAC
CH1, CH0
REF−
REF+
SAD7 to SAD0
MGL115
Fig.3 SAD block diagram.
1997 Jun 24
11
11 Page | ||
| Páginas | Total 48 Páginas | |
| PDF Descargar | [ Datasheet SAA5288.PDF ] | |
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