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SAA7184WP PDF даташит

Спецификация SAA7184WP изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «Digital Video Encoders DENC2-M6».

Детали детали

Номер произв SAA7184WP
Описание Digital Video Encoders DENC2-M6
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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SAA7184WP Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
DATA SHEET
SAA7184; SAA7185B
Digital Video Encoders
(DENC2-M6)
Preliminary specification
Supersedes data of 1995 Nov 14
File under Integrated Circuits, IC22
1996 Jul 03









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SAA7184WP Даташит, Описание, Даташиты
Philips Semiconductors
Digital Video Encoders (DENC2-M6)
Preliminary specification
SAA7184; SAA7185B
FEATURES
CMOS 5 V device
Digital PAL/NTSC encoder
System pixel frequency 13.5 MHz
Accepts MPEG decoded data
8-bit wide MPEG port
Input data format Cb, Y, Cr etc. (CCIR 656)
16-bit wide YUV input port
I2C-bus control port or alternatively MPU parallel control
port
Encoder can be master or slave
Programmable horizontal and vertical input
synchronization phase
Programmable horizontal sync output phase
OVL overlay with Look-Up Tables (LUTs) 8 × 3 bytes
Colour bar generator
Line 21 closed caption encoder
Cross-colour reduction
Macrovision revision_6 Pay-per-View copy protection
system as option (SAA7184 only). Remark: This device
is protected by U.S. patent numbers 4631603 4577216
and 4819098 and other intellectual property rights.
Use of the Macrovision anticopy process in the device is
licensed for non-commercial home use only. Reverse
engineering or disassembly is prohibited. Please
contact your nearest Philips Semiconductors sales
office for more information.
DACs operating at 27 MHz with 10-bit resolution
Controlled rise and fall times of output syncs and
blanking
Down-mode of DACs
CVBS and S-Video output simultaneously
PLCC68 package.
GENERAL DESCRIPTION
The SAA7184 and SAA7185B digital video encoders 2
(DENC2-M6) encode digital YUV video data to an NTSC
or PAL CVBS or S-Video signal.
The circuit accepts CCIR compatible YUV data with
720 active pixels per line in 4 : 2 : 2 multiplexed formats,
for example MPEG decoded data. The device includes a
sync/clock generator and on-chip Digital-to-Analog
Converters (DACs).
The circuit is compatible to the DIG-TV2 chip family.
ORDERING INFORMATION
TYPE NUMBER
SAA7184WP
SAA7185BWP
NAME
PLCC68
PACKAGE
DESCRIPTION
plastic leaded chip carrier; 68 leads
VERSION
SOT188-2
1996 Jul 03
2









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SAA7184WP Даташит, Описание, Даташиты
Philips Semiconductors
Digital Video Encoders (DENC2-M6)
Preliminary specification
SAA7184; SAA7185B
QUICK REFERENCE DATA
SYMBOL
VDDA
VDDD
IDDA
IDDD
Vi
Vo(p-p)
RL
ILE
DLE
Tamb
PARAMETER
MIN. TYP. MAX.
analog supply voltage
4.75 5.0
5.25
digital supply voltage
analog supply current
digital supply current
4.5 5.0 5.5
50 55
130 170
input signal voltage levels
analog output signal voltages Y, C and CVBS without load
(peak-to-peak value)
load resistance
LF integral linearity error
LF differential linearity error
operating ambient temperature
80
0
TTL compatible
2
−−
− ±2
− ±1
+70
UNIT
V
V
mA
mA
V
V
LSB
LSB
°C
BLOCK DIAGRAM
KEY
OVL0
SEL_ED
to OVL2
RTCI
VDDD1
to VDDD3
VDDA1
to
VrefH VDDA4
IOA
MP7
to MP0
VP0
to VP7
20 to 27
9 to 16
8
8
18 31 32 to 34
DATA
MANAGER
43
ENCODER
17,37,67
OUTPUT
INTERFACE
47 55 48,50,
54,56
53
A 51
D 49
CVBS
Y
CHROMA
RCM1
RCM2
8 8 8 52 VSSA
internal control bus
46 VrefL
29
30
8
clock timing signals
8 SAA7184
SAA7185B
1,8,19
28,35,
42,62
63 to 66
2 to 5
8 CONTROL
INTERFACE
SYNC
CLK
68 61 59 60 58 57
41 40 38 39 36 6 7
VSSD1
to
VSSD7
DP0
CSN/SA A0/SDA RES
to DP7
RWN/SCL DTACK
SEL_MPU
XTALI
LLC CDIR RCV2
XTALO CREF RCV1
MGC679
1996 Jul 03
Fig.1 Block diagram.
3










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Номер в каталогеОписаниеПроизводители
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