SAA7188 PDF даташит
Спецификация SAA7188 изготовлена «NXP Semiconductors» и имеет функцию, называемую «Digital Video Encoder DENC2-M». |
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Детали детали
Номер произв | SAA7188 |
Описание | Digital Video Encoder DENC2-M |
Производители | NXP Semiconductors |
логотип |
30 Pages
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INTEGRATED CIRCUITS
DATA SHEET
SAA7188A
Digital Video Encoder (DENC2-M)
Preliminary specification
Supersedes data of 1995 Sep 21
File under Integrated Circuits, IC22
1996 Jul 08
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Philips Semiconductors
Digital Video Encoder (DENC2-M)
Preliminary specification
SAA7188A
FEATURES
• CMOS 5 V device
• Digital PAL/NTSC encoder
• System pixel frequency 13.5 MHz
• Accepts MPEG decoded data
• 8-bit wide MPEG port
• Input data format Cb, Y, Cr, etc. (CCIR 656)
• 16-bit wide YUV input port
• I2C-bus control port or alternatively MPU parallel
control port
• Encoder can be master or slave
• Programmable horizontal and vertical input
synchronization phase
• Programmable horizontal sync output phase
• OSD overlay with Look-Up Tables (LUTs) 8 × 3 bytes
• Colour bar generator
• Line 21 Closed Caption encoder
• Macrovision Pay-per-View copy protection system as
option
The device is protected by USA patent numbers
4631603, 4577216 and 4819098 and other intellectual
property rights. Use of the Macrovision anti-copy
process in the device is licensed for non-commercial
home use only, which is its sole intended use in
this device.
Please contact your nearest Philips Semiconductors
sales office for more information.
• Cross-colour reduction
• DACs operating at 27 MHz with 10-bit resolution
• Controlled rise/fall times of output syncs and blanking
• Down-mode of DACs
• CVBS and S-Video output simultaneously
• PLCC68 package.
GENERAL DESCRIPTION
The SAA7188A encodes digital YUV video data to an
NTSC, PAL CVBS or S-Video signal.
The circuit accepts CCIR compatible YUV data with
720 active pixels per line in 4 : 2 : 2 multiplexed formats,
e.g. MPEG decoded data. It includes a sync/clock
generator and on-chip Digital-to-Analog Converters
(DACs).
The circuit is compatible to the DIG-TV2 chip family.
QUICK REFERENCE DATA
SYMBOL
VDDA
VDDD
IDDA
IDDD
Vi
Vo(p-p)
RL
ILE
DLE
Tamb
PARAMETER
MIN. TYP. MAX.
analog supply voltage
4.75 5.0
5.25
digital supply voltage
analog supply current
digital supply current
4.5 5.0 5.5
− 50 55
− 140 170
input signal voltage levels
analog output signal voltages Y, C and CVBS without load
(peak-to-peak value)
load resistance
LF integral linearity error
LF differential linearity error
operating ambient temperature
−
80
−
−
0
TTL compatible
2−
−−
− ±2
− ±1
− +70
UNIT
V
V
mA
mA
V
Ω
LSB
LSB
°C
1996 Jul 08
2
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Philips Semiconductors
Digital Video Encoder (DENC2-M)
ORDERING INFORMATION
TYPE NUMBER
SAA7188AWP
NAME
PLCC68
BLOCK DIAGRAM
PACKAGE
DESCRIPTION
plastic leaded chip carrier; 68 leads
Preliminary specification
SAA7188A
VERSION
SOT188-2
KEY
OSD0
SEL_ED
to OSD2
RTCI
VDDD1
to VDDD3
VDDA1
to
VrefH VDDA4
II
MP7
to MP0
VP0
to VP7
20 to 27
9 to 16
8
8
18 31 32 to 34
DATA
MANAGER
43
ENCODER
17,37,67
OUTPUT
INTERFACE
47 55 48,50,
54,56
53
A 51
D 49
CVBS
Y
CHROMA
RCM1
RCM2
8 8 8 52 VSSA
internal control bus
46 VrefL
29
30
8
clock timing signals
8 SAA7188A
1,8,19
28,35,
42,62
63 to 66
2 to 5
8 CONTROL
INTERFACE
SYNC
CLK
68 61 59 60 58 57
41 40 38 39 36 6 7
VSSD1
to
VSSD7
DP0
CS/SA A0/SDA RESET XTALI
LLC CDIR RCV2
to DP7
RW/SCL DTACK
SEL_MPU
XTALO CREF RCV1
MBG266
Fig.1 Block diagram.
1996 Jul 08
3
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