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SAA7206H PDF даташит

Спецификация SAA7206H изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «DVB compliant descrambler».

Детали детали

Номер произв SAA7206H
Описание DVB compliant descrambler
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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SAA7206H Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
DATA SHEET
SAA7206H
DVB compliant descrambler
Product specification
Supersedes data of 1996 Oct 02
File under Integrated Circuits, IC02
1996 Oct 09









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SAA7206H Даташит, Описание, Даташиты
Philips Semiconductors
DVB compliant descrambler
CONTENTS
1
2
3
4
5
6
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
8
9
10
11
12
13
14
14.1
14.2
14.3
14.3.1
14.3.2
14.3.3
14.4
15
16
FEATURES
GENERAL DESCRIPTION
ORDERING INFORMATION
QUICK REFERENCE DATA
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
MPEG-2 systems parsing
PES level descrambling
Descrambler core
Microcontroller interface
Output interfacing
Boundary scan test
Programming the descrambler
LIMITING VALUES
HANDLING
THERMAL CHARACTERISTICS
DC CHARACTERISTICS
AC CHARACTERISTICS
PACKAGE OUTLINE
SOLDERING
Introduction
Reflow soldering
Wave soldering
QFP
SO
Method (QFP and SO)
Repairing soldered joints
DEFINITIONS
LIFE SUPPORT APPLICATIONS
Product specification
SAA7206H
1996 Oct 09
2









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SAA7206H Даташит, Описание, Даташиты
Philips Semiconductors
DVB compliant descrambler
Product specification
SAA7206H
1 FEATURES
Input data fully compliant with the Transport Stream
(TS) definition of the MPEG-2 systems specification
Input data signals; [Forward Error Correction (FEC)
Interface]
– modem data input bus (8-bit wide)
– valid input data indicator
– erroneous packet indicator
– first packet byte indicator
– byte strobe signal (for asynchronous mode only).
The interface can be programmed to one of two modes:
– Asynchronous mode; byte strobe input signal
(MBCLK) < 9 MHz, for connection to a modem (FEC)
– Synchronous mode; MBCLK is not used. Data is
delivered to the descrambler synchronized with the
chip clock (DCLK) [9 MHz (typ.) with a 33% duty
cycle].
No external memory
Effective bit rate; fbit 72 MHz
Control interface; 8-bit multiplexed data/address,
memory mapped I/O (90CE201 microcontroller parallel
bus compatible), in combination with a microcontroller
interrupt signal (IRQ)
Output ports are identical to the input data interface
(demultiplexer interface)
– except for the packet error indicator (MB/MB), as the
descrambler translates an active MB signal to the
‘transport_error_indicator’ bit in the transport stream
– except for the byte strobe input signal (MBCLK), as
data is delivered to the demultiplexer, synchronized
with the descrambler chip clock which is generated
by the demultiplexer
Descrambler, based on the super descrambler
mechanism algorithm with stream decipher and block
decipher. The descrambler is initialized with a 64-bit
Control Word (CW) at the beginning of a transport
stream packet payload of a selected Packet
Identification (PID). The descrambler operates on
transport stream packet or Packetized Elementary
Stream (PES) packet payloads
Microcontroller support; only for control, no specific
descrambling tasks are performed by the
microcontroller. However, parsing and processing of
conditional access information (such as EMM and ECM
data) is left to the system microcontroller
Boundary scan test port for boundary scan.
2 GENERAL DESCRIPTION
The SAA7206H (DVB compliant) is designed for use in
MPEG-2 based digital TV receivers, incorporating
conditional access filters. Such receivers are to be
implemented in, for instance, a digital video broadcasting
top set box, or an integrated digital TV receiver.
An example of a demultiplexer/descrambler system
configuration, containing a channel decoder module, a
demultiplexer, a system controller and a conditional
access system is shown in Fig.3. The main function of the
descrambler is to descramble the payloads of MPEG-2 TS
packets or PES packets. In addition, the descrambler
retrieves Conditional Access (CA) data [such as
Entitlement Management Messages (EMM) and
Entitlement Control Messages (ECM) etc.] from the stream
and passes it to the system microcontroller for processing.
3 ORDERING INFORMATION
TYPE NUMBER
SAA7206H
NAME
QFP64
PACKAGE
DESCRIPTION
plastic quad flat package; 64 leads (lead length 1.95 mm);
body 14 × 20 × 2.8 mm
VERSION
SOT319-2
1996 Oct 09
3










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