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PDF SAA7367 Data sheet ( Hoja de datos )
| Número de pieza | SAA7367 | |
| Descripción | Bitstream conversion ADC for digital audio systems | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
SAA7367
Bitstream conversion ADC for
digital audio systems
Product specification
Supersedes data of 1996 Jun 17
File under Integrated Circuits, IC01
1998 Nov 17
1 page  
Philips Semiconductors
Bitstream conversion ADC for
digital audio systems
Product specification
SAA7367
SYMBOL
SLAVE
PIN DESCRIPTION
24 TTL level input; used to select the serial interface operating mode:
SLAVE = HIGH selects slave mode
SLAVE = LOW selects master mode
Table 1 SWS polarity
CONDITIONS
SLAVE AND TEST1
SLAVE = LOW or TEST1 = LOW
SLAVE = HIGH and TEST1 = HIGH
SWS
LOW
LOW
LOW
LOW
SFOR
LOW
HIGH
LOW
HIGH
POLARITY
left data
right data
right data
left data
Table 2 Selection of serial interface formats via TEST1
CONDITIONS
HIGH
LOW
SFOR
TEST1
LOW
HIGH
LOW
HIGH
SELECTED FORMAT
format 1
format 3
format 2
format 4
handbook, halfpage
SFOR 1
24 SLAVE
STDB 2
OVLD 3
CKIN 4
23 VDDA
22 VrefL
21 BIL
VDDD 5
VSSD 6
SDO 7
SWS 8
20 BOL
19 VDACP
SAA7367
18 VDACN
17 BOR
SCK 9
16 BIR
TEST1 10
HPEN 11
TESTB 12
15 VrefR
14 Iref
13 VSSA
MGE644
FUNCTIONAL DESCRIPTION
General
The SAA7367 is a bitstream conversion CMOS ADC for
digital audio systems. The conversion is achieved using a
third-order Sigma-Delta Modulator (SDM), running at
128 times the output sample frequency (fs). The high
oversampling ratio greatly simplifies the design of the
analog input anti-alias filter. In most events, the internal
buffer operational amplifier, configured as a low-pass filter,
will suffice. The 1-bit code from the SDM is filtered and
down-sampled (decimated) to 1fs by Finite Impulse
Response (FIR) filters. An optional I2R high-pass filter is
provided to remove DC, if required. The device has been
designed with ease of use, low board area and low
application costs in mind.
Clock frequency
The external clock input on pin CKIN runs at 256fs, which
can range from 18 to 50 kHz.
Fig.2 Pin configuration.
1998 Nov 17
5
5 Page 
Philips Semiconductors
Bitstream conversion ADC for
digital audio systems
Product specification
SAA7367
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
Analog part at: VDD = VDDA = 5 V; Tamb = 25 °C
VrefL AND VrefR
VO output voltage
RDC DC impedance
normal mode
standby mode
0.475VDDA
−
−
CURRENT REFERENCE: Iref
VO out put voltage
IO output current
R = 33 kΩ
−
−
VDACN
VI
input voltage
−
VDACP
VI input voltage
−
BUFFER OPERATIONAL AMPLIFIERS: BIL, BOL, BIR AND BOR
VI(off)
RL
ZO
THD + N
input offset voltage
load resistance; (drive capability)
output impedance
total harmonic distortion plus
noise
−
decoupled to Vref −
−
f = 0 to 20 kHz −
0.5VDDA
1.3
100
0.5VDDA
76
VSS
VDDA
<10
10
100
−87
0.525VDDA
−
−
−
−
−
−
−
−
−
−
OVERALL PERFORMANCE (ANALOG IN, DIGITAL OUT)
tgd group delay time
αsb stop band attenuation
DR dynamic range
THD + N
total harmonic distortion plus
noise
S/N signal-to-noise ratio
αcs channel separation
G gain
T = 1/fs
f > 0.546 fs
0 to 20 kHz
0 to 20 kHz
A-weighted
note 2
−
60
90
−
−
−
−1.4
25T −
−−
93 −
−88 −80
97 −
92 −
−1 −0.8
Notes
1. Load capacitance is valid for master mode only.
2. See also Section “Input level” of Chapter “Functional description”; valid for left or right channel.
UNIT
V
kΩ
kΩ
V
µA
V
V
mV
kΩ
Ω
dB
s
dB
dB
dB
dB
dB
dB
1998 Nov 17
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet SAA7367.PDF ] | |
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