SAA7385 PDF даташит
Спецификация SAA7385 изготовлена «NXP Semiconductors» и имеет функцию, называемую «Error correction and host interface IC for CD-ROM SEQUOIA». |
|
Детали детали
Номер произв | SAA7385 |
Описание | Error correction and host interface IC for CD-ROM SEQUOIA |
Производители | NXP Semiconductors |
логотип |
30 Pages
No Preview Available ! |
INTEGRATED CIRCUITS
DATA SHEET
SAA7385
Error correction and host interface
IC for CD-ROM (SEQUOIA)
Preliminary specification
File under Integrated Circuits, IC01
1996 Jun 19
No Preview Available ! |
Philips Semiconductors
Error correction and host interface IC
for CD-ROM (SEQUOIA)
CONTENTS
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
2
3
4
5
6
7
7.1
7.2
7.3
7.4
8
8.1
8.2
8.3
8.4
9
9.1
9.2
10
10.1
10.2
FEATURES
General
53CF94 SCSI controller
80C32 high-speed microcontroller
Front-end interface logic
Buffer controller
Hardware third-level error correction
Additional product support
GENERAL DESCRIPTION
QUICK REFERENCE DATA
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
80C32 microcontroller
53CF94 fast SCSI controller
Input clock doubler
Front-end
MICROCONTROLLER INTERFACE
Microcontroller interface status register
Microcontroller interface command register
Microcontroller interrupts
Microcontroller RAM organization
FRONT PANEL AND MISCELLANEOUS
CONTROL SIGNALS
S2B UART registers
Miscellaneous control registers
FRONT-END
Minute Second Frame (MSF) addressing and
header information
Front-end status and control
11
11.1
11.2
11.3
11.4
11.5
11.6
12
13
14
15
15.1
15.2
15.3
15.4
15.5
15.6
15.7
15.8
16
17
17.1
17.2
17.3
17.4
18
19
Preliminary specification
SAA7385
BUFFER MANAGER
Front-end to buffer manager interface
Microcontroller to buffer manager interface
ECC to buffer manager interface
SCSI to buffer manager interface
Miscellaneous buffer manager considerations
53CF94 related registers
FRAME BUFFER ORGANIZATION
SUMMARY OF CONTROL REGISTER MAP
LIMITING VALUES
OPERATING CHARACTERISTICS
I2S-bus timing; data mode
EIAJ timing; audio mode
R-W timing (see Fig.15)
C-flag timing (see Fig.16)
S2B interface timing
SCSI interface timing
Microprocessor interface
DRAM interface (the SAA7385 is designed to
operate with standard 70 ns DRAMs)
PACKAGE OUTLINE
SOLDERING
Introduction
Reflow soldering
Wave soldering
Repairing soldered joints
DEFINITIONS
LIFE SUPPORT APPLICATIONS
1996 Jun 19
2
No Preview Available ! |
Philips Semiconductors
Error correction and host interface IC for
CD-ROM (SEQUOIA)
Preliminary specification
SAA7385
1 FEATURES
1.1 General
• Single chip digital solution for an 8 × speed CD-ROM
controller chip
• 10 Mbytes/s NCR53CF94 equivalent SCSI controller
included
• High-speed 80C32 microcontroller with 256 × 8
scratch-pad SRAM included
• High performance CD-ROM interface logic
• 128 pin QFP package.
1.2 53CF94 SCSI controller
• Separate clock input to allow operation up to the
maximum 10 Mbytes/s
• Fast synchronous SCSI-2 compatible
• 24-bit transfer counter for single transfers up to
16 Mbytes
• High-speed 16-bit DMA interface to the buffer manager
DRAM
• On-chip 48 mA SCSI drivers
• Software compatible with members of the 53C90 family
• Allows for SCAM support.
1.5 Buffer controller
• Ten level arbitration logic
• Utilizes low cost 70 ns DRAMs
• Page mode DRAM access for high-speed error
correction and SCSI data transfer
• Data organization by 3 kbyte frames
• 256 kbyte or 1 Mbyte DRAM supported.
1.6 Hardware third-level error correction
• Third-level correction provides superior performance in
unfavourable conditions
• Full hardware error correction to reduce microcontroller
overhead
• Corrections are automatically written to the DRAM
frame buffer.
1.7 Additional product support
• All control registers mapped into 80C32 special function
memory space
• Dedicated S2B interface UART
• Input clock synthesizer
• Red book audio pass through.
1.3 80C32 high-speed microcontroller
• 33.87 MHz full system speed operation
• Three timers/event counters
• Programmable full duplex serial channel
• Eight general purpose microcontroller I/O pins
• External program ROM.
1.4 Front-end interface logic
• Full 8 × speed hardware operation
• Block decoder
• Sector sequencer
• CRC checking of Mode 1 and Mode 2, Form 1 sectors
• 212 ms watch-dog timer
• Sub-code interface with synchronization
• C-flag interface for absolute time stamp.
2 GENERAL DESCRIPTION
The SAA7385 is a high integration ASIC that incorporates
all of the digital electronics necessary to connect a CD
decoder to a SCSI host. An 80C32 microcontroller and a
53CF94 SCSI controller are embedded in the ASIC.
The following functions are supported:
• Input clock doubler
• Block decoder
• CRC checking of Mode 1 and Mode 2, Form 1 sectors
• Red book audio pass through to SCSI
• Buffer manager
• Third-level error correction
• Sub-code and Q-channel support
• Dedicated S2B interface UART
• Embedded 80C32 microcontroller
• Embedded 53CF94 SCSI controller.
1996 Jun 19
3
Скачать PDF:
[ SAA7385.PDF Даташит ]
Номер в каталоге | Описание | Производители |
SAA7380 | Error correction and host interface IC for CD-ROM ELM | NXP Semiconductors |
SAA7380GP | Error correction and host interface IC for CD-ROM ELM | NXP Semiconductors |
SAA7381 | ATAPI CD-R block decoder | NXP Semiconductors |
SAA7382 | Error correction and host interface IC for CD-ROM ELM | NXP Semiconductors |
Номер в каталоге | Описание | Производители |
TL431 | 100 мА, регулируемый прецизионный шунтирующий регулятор |
Unisonic Technologies |
IRF840 | 8 А, 500 В, N-канальный МОП-транзистор |
Vishay |
LM317 | Линейный стабилизатор напряжения, 1,5 А |
STMicroelectronics |
DataSheet26.com | 2020 | Контакты | Поиск |