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SAA7390 PDF даташит

Спецификация SAA7390 изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «High performance Compact Disc-Recordable CD-R controller».

Детали детали

Номер произв SAA7390
Описание High performance Compact Disc-Recordable CD-R controller
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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SAA7390 Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
DATA SHEET
SAA7390
High performance Compact
Disc-Recordable (CD-R) controller
Preliminary specification
File under Integrated Circuits, IC01
1996 Jul 02









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SAA7390 Даташит, Описание, Даташиты
Philips Semiconductors
High performance Compact
Disc-Recordable (CD-R) controller
CONTENTS
1
1.1
1.2
1.3
1.4
1.5
1.6
2
3
4
5
6
7
7.1
7.2
7.3
7.4
7.5
8
8.1
8.2
8.3
8.4
9
9.1
9.2
9.3
9.4
10
10.1
10.2
11
FEATURES
General
Interface logic (CD-ROM operation)
Hardware third-level error correction
Interface logic (CD-R operation)
DRAM buffer controller (256 kbytes × 8,
1 Mbyte × 8, 4 Mbytes × 8)
Additional product support
GENERAL DESCRIPTION
QUICK REFERENCE DATA
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
Input clock doubler
Block encoder
Front-end
Track descriptor block
Buffer manager
MICROCONTROLLER INTERFACE
Microprocessor interface status register
Microcontroller interface command register
Microprocessor interrupts
Microcontroller RAM organization
FRONT PANEL AND MISCELLANEOUS
CONTROL SIGNALS
S2B UART registers
SPI UART registers
Track Descriptor Block (TDB) generation
Miscellaneous control registers
FRONT-END
Minute-second frame addressing and header
information
Front-end status and control
BUFFER MANAGER
11.1
11.2
11.3
11.4
11.5
11.6
11.7
12
13
14
15
15.1
15.2
15.3
15.4
15.5
15.6
15.7
15.8
15.9
16
17
17.1
17.2
17.3
17.4
18
19
Preliminary specification
SAA7390
Front-end to buffer manager interface
Microcontroller to buffer manager interface
ECC to buffer manager interface
SCSI to buffer manager interface
Miscellaneous buffer manager considerations
Host interface related registers
CDB2 related registers
FRAME BUFFER ORGANIZATION
SUMMARY OF CONTROL REGISTER MAP
LIMITING VALUES
OPERATING CHARACTERISTICS
I2S-bus timing; data mode
EIAJ timing; audio mode
R-W timing (see Fig.17)
C-flag timing (see Fig.18)
S2B interface timing
SPI interface timing
Microprocessor interface
Host interface
DRAM interface (the SAA7390 is designed to
operate with standard 70 ns DRAMs)
PACKAGE OUTLINE
SOLDERING
Introduction
Reflow soldering
Wave soldering
Repairing soldered joints
DEFINITIONS
LIFE SUPPORT APPLICATIONS
1996 Jul 02
2









No Preview Available !

SAA7390 Даташит, Описание, Даташиты
Philips Semiconductors
High performance Compact
Disc-Recordable (CD-R) controller
Preliminary specification
SAA7390
1 FEATURES
1.1 General
8× speed CD-ROM, 4× speed Compact
Disc-Recordable (CD-R) controller
16.9 Mbytes/s burst rate to host controller
High performance CD-ROM and CD-R interface logic
128 pin QFP package.
1.2 Interface logic (CD-ROM operation)
Full 8× speed hardware operation
Block decoder
Sector sequencer
CRC checking of Mode 1 and Mode 2, Form 1 sectors
212 ms watch-dog timer
Sub-code interface with synchronization
C-flag interface for absolute time stamp.
1.3 Hardware third-level error correction
Third-level correction provides superior performance in
unfavourable conditions
Full hardware error correction to reduce microcontroller
overhead
Corrections are automatically written to the DRAM
frame buffer.
1.4 Interface logic (CD-R operation)
Block encoder (using a modified CDB2).
1.5 DRAM buffer controller (256 kbytes × 8,
1 Mbyte × 8, 4 Mbytes × 8)
DRAM buffer manager
Ten level arbitration logic
Utilizes low cost 70 ns DRAMs
Page mode DRAM access for high-speed error
correction and host interface data transfers
Data organization by 3 kbytes frames.
1.6 Additional product support
Input clock doubler
All control registers mapped into 80C32 special function
memory space
Red book audio pass through to host interface
Sub-code and Q-channel support
Dedicated Serial Peripheral Interface (SPI)
Third level error correction and encoding
80C32 microcontroller interface
53CF90 or 53CF92A/B fast SCSI processor interface
(may also use ATAPI processor).
2 GENERAL DESCRIPTION
The SAA7390 is a high integration ASIC that incorporates
all of the logic necessary to connect a CD-60 based
decoder to a SCSI or ATAPI host. It also supports a data
path from the host to the CDCEP (compact disc encoder)
for CD-R applications. An 80C32 microcontroller and a
53CF94/92A (or an ATAPI interface device) are required
to provide the full block encode/decode functions. The
following functions are supported:
Input clock doubler
Block encoder (using a modified CDB2)
Block decoder
CRC checking of Mode 1 and Mode 2, Form 1 sectors
Red book audio pass through to SCSI or ATAPI
Sub-code and Q-channel support
Dedicated S2B interface UART
Dedicated SPI interface UART
Up to 4 Mbytes DRAM buffer manager
Third-level error correction and encoding
Automatic storage of audio and data
80C32 microcontroller interface
53CF90 or 53CF92A/B fast SCSI or Wapiti ATAPI
processor interface.
The SAA7390 uses a 33.8688 MHz clock and is capable
of accepting data at eight times (n = 8 or 1.4 Mbytes/s) the
normal CD-ROM data rate. The minimum host burst rate
capability of the SAA7390 is 5 Mbytes/s.
Third level error correction hardware is included to
improve the correction efficiency of the system. The buffer
manager hardware utilizes a ten-level arbitration unit and
can stop the clock to the static microcontroller to emulate
a wait condition when necessary. The host interface is
capable of burst rates to 16.9 Mbytes/s.
1996 Jul 02
3










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