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PDF SAB9075H Data sheet ( Hoja de datos )
| Número de pieza | SAB9075H | |
| Descripción | Picture-in-Picture PIP controller for NTSC | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
SAB9075H
Picture-in-Picture (PIP) controller
for NTSC
Preliminary specification
File under Integrated Circuits, IC02
February 1995
Philips Semiconductors
1 page  
Philips Semiconductors
Picture-in-Picture (PIP) controller for NTSC
Preliminary specification
SAB9075H
PINNING
SYMBOL
MPVDDA
MPVSSA
MHsync
MPIbias
MPVSSD
MTCLK
MPVDDD
MVDDD
MVSSD
DAVDDD
DAVSSD
n.c.
DAVrefTU
DU
DAVrefTV
DV
DAVrefTY
DY
DAIbias
DAVSSA
DAVDDA
I2CVDD
MVsync
DBF
DAI5
DAI4
SC
DAI7
DAI0
DAI6
DAI1
DT
DAI3
DAO7
DAI2
DAO0
DAO6
DAO3
DAO1
DAO2
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
February 1995
I/O
I/O
I/O
I
I
I/O
I
I/O
I/O
I/O
I/O
I/O
−
I/O
O
I/O
O
I/O
O
I
I/O
I/O
I/O
I
O
I
I
O
I
I
I
I
O
I
O
I
O
O
O
O
O
TYPE
E030
E009
E027
E027
E009
HPP01
E030
E030
E009
E030
E009
−
E027
E027
E027
E027
E027
E027
E027
E009
E030
E030
HPP01
SPF20
HPP01
HPP01
OPF20
HPP01
HPP01
HPP01
HPP01
OPF20
HPP01
OPF20
HPP01
OPF20
OPF20
OPF20
OPF20
OPF20
DESCRIPTION
analog positive power supply for PLL main-channel
analog negative power supply for PLL main-channel
horizontal synchronization for main-channel
analog bias reference current for PLL main-channel
digital negative power supply for PLL main-channel
test clock for main-channel
digital positive power supply for PLL main-channel
digital positive power supply for main-channel core
digital negative power supply for main-channel core
digital positive power supply for DACs
digital negative power supply for DACs
not connected
analog reference voltage for top U DAC
analog U output
analog reference voltage for top V DAC
analog V output
analog reference voltage for top Y DAC
analog Y output
analog bias reference current for DACs
analog negative power supply for DACs
analog positive power supply for DACs
positive supply for HUE and SAT decoders
vertical synchronization for main-channel
fast blanking control output signal
data bus input from memory; bit 5
data bus input from memory; bit 4
memory shift clock
data bus input from memory; bit 7
data bus input from memory; bit 0
data bus input from memory; bit 6
data bus input from memory; bit 1
memory data transfer; active LOW
data bus input from memory; bit 3
data bus output to memory; bit 7
data bus input from memory; bit 2
data bus output to memory; bit 0
data bus output to memory; bit 6
data bus output to memory; bit 3
data bus output to memory; bit 1
data bus output to memory; bit 2
5
5 Page 
Philips Semiconductors
Picture-in-Picture (PIP) controller for NTSC
Preliminary specification
SAB9075H
PIP modes
The controller contains two independent acquisition-channels which provide the scaling factors to support the range of
different modes. With the external memory of 2 Mbit it is possible to select between single, double and multi-PIP modes.
Table 2 gives an overview of the different PIP modes.
Table 2 PIP modes
MODE
SUB
MAIN
SUB SIZE(1)
PIXELS REDUCTION(2)
MAIN SIZE(1)
PIXELS REDUCTION(2)
4 : 3 main + 4 : 3 sub to 4 : 3 screen or 16 : 9 main + 16 : 9 sub to 16 : 9 screen
1.1
SPS
1⁄16
−
1.2
SPL
1⁄9
−
1.3 DP 1⁄4
1⁄4
1.4
MP3
3 × 1⁄16
−
1.5
MP4
3 × 1⁄16
1⁄4
1.6
MP7
7 × 1⁄16
−
1.7
MP8
7 × 1⁄16
1⁄4
1.8
MP9
8 × 1⁄9
1⁄9
160P, 53L 1⁄4H, 1⁄4V
216P, 72L 1⁄3H, 1⁄3V
304P, 108L 1⁄2H, 1⁄2V
160P, 53L 1⁄4H, 1⁄4V
160P, 53L 1⁄4H, 1⁄4V
160P, 53L 1⁄4H, 1⁄4V
160P, 53L 1⁄4H, 1⁄4V
216P, 72L 1⁄3H, 1⁄3V
16 : 9 sub + 4 : 3 main to 4 : 3 screen
2.1
SPS
1⁄16
−
2.2
SPL
1⁄9
−
216P, 53L 1⁄3H, 1⁄4V
304P, 72L 1⁄2H, 1⁄3V
4 : 3 sub + 16 : 9 main to 16 : 9 screen
3.1
SPS
1⁄16
−
3.2 DP 1⁄4
1⁄4
160P, 72L 1⁄4H, 1⁄3V
216P, 108L 1⁄3H, 1⁄2V
−−
−−
304P, 108L 1⁄2H, 1⁄2V
−−
304P, 108L 1⁄2H, 1⁄2V
−−
304P, 108L 1⁄2H, 1⁄2V
216P, 72L 1⁄3H, 1⁄3V
−−
−−
304P, 108L 1⁄2H, 1⁄2V
Notes
1. The given sub/main sizes are visible PIP sizes, a border is drawn around these PIPs and does not influence these
sizes. The size of the border is 4 pixels wide and 2 lines/fields high.
2. The SAB9075H can be set in automatic mode in which the reduction factors are automatically set by the mode select
and aspect ratio select bits of the I2C-bus. If the automatic mode is switched OFF the reduction factors can be set
manually. This will give more flexibility to adjust the aspect ratios of incoming signals.
PIP positions
The positions are graphically depicted in Figs 5 to 17.
February 1995
11
11 Page | ||
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| PDF Descargar | [ Datasheet SAB9075H.PDF ] | |
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