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PDF HM62V16100LTI-5SL Data sheet ( Hoja de datos )
| Número de pieza | HM62V16100LTI-5SL | |
| Descripción | Wide Temperature Range Version | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HM62V16100LTI-5SL (archivo pdf) en la parte inferior de esta página. Total 25 Páginas | ||
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HM62V16100I Series
Wide Temperature Range Version
16 M SRAM (1-Mword × 16-bit)
REJ03C0060-0200Z
Rev. 2.00
Oct.06.2003
Description
The HM62V16100I Series is 16-Mbit static RAM organized 1-Mword × 16-bit. HM62V16100I Series has
realized higher density, higher performance and low power consumption by employing CMOS process
technology (6-transistor memory cell). It offers low power standby power dissipation; therefore, it is
suitable for battery backup systems. It has the package variations of 48-bump chip size package with 0.75
mm bump pitch and 48-pin plastic TSOPI for high density surface mounting.
Features
• Single 3.0 V supply: 2.7 V to 3.6 V
• Fast access time: 45/55 ns (max)
• Power dissipation:
Active: 9 mW/MHz (typ)
Standby: 1.5 µW (typ)
• Completely static memory.
No clock or timing strobe required
• Equal access and cycle times
• Common data input and output.
Three state output
• Battery backup operation.
2 chip selection for battery backup
• Temperature range: −40 to +85°C
Rev.2.00, Oct.06.2003, page 1 of 23
1 page  
HM62V16100I Series
48-bumps CSP
1 23456
A LB OE A0 A1 A2 CS2
B I/O8 UB A3 A4 CS1 I/O0
C I/O9 I/O10 A5 A6 I/O1 I/O2
D VSS I/O11 A17 A7 I/O3 VCC
E VCC I/O12 VSS A16 I/O4 VSS
F I/O14 I/O13 A14 A15 I/O5 I/O6
G I/O15 A19 A12 A13 WE I/O7
H A18 A8
A9 A10 A11 NU
(Top view)
Pin Description (CSP)
Pin name
Function
A0 to A19
Address input
I/O0 to I/O15
Data input/output
CS1 Chip select 1
CS2 Chip select 2
WE Write enable
OE Output enable
LB Lower byte select
UB Upper byte select
VCC
VSS
NU*1
Power supply
Ground
Not used (test mode pin)
Note: 1. This pin should be connected to a ground (VSS), or not be connected (open).
Rev.2.00, Oct.06.2003, page 5 of 23
5 Page 
HM62V16100I Series
Notes: 1. Typical values are at VCC = 3.0 V, Ta = +25°C and not guaranteed.
2. BYTE pin supported by only TSOP type.
BYTE ≥ VCC − 0.2 V or BYTE ≤ 0.2 V
3. This characteristic is guaranteed only for L-version.
4. This characteristic is guaranteed only for L-SL version.
5. ICC2 is the value measured while the valid address is increasing or decreasing by one bit.
Word mode: LSB (least significant bit) is A0.
Byte mode: LSB (least significant bit) is A-1.
Capacitance
(Ta = +25°C, f = 1.0 MHz)
Parameter
Symbol Min Typ Max
Input capacitance
Cin 8
Input/output capacitance CI/O
10
Note: 1. This parameter is sampled and not 100% tested.
Unit
pF
pF
Test conditions Note
Vin = 0 V
1
VI/O = 0 V
1
Rev.2.00, Oct.06.2003, page 11 of 23
11 Page | ||
| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet HM62V16100LTI-5SL.PDF ] | |
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