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PDF Z85233 Data sheet ( Hoja de datos )
| Número de pieza | Z85233 | |
| Descripción | The Zilog SCC Serial Communication Controller | |
| Fabricantes | Zilog. | |
| Logotipo |  |
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1 page  
SCC™/ESCC™ User’s Manual
Table of Contents
5.3.7
5.3.8
5.3.9
5.3.10
5.3.11
5.3.12
5.3.13
5.3.14
5.3.15
5.3.16
Read Register 6 (Not on NMOS) ................................................................................... 5-25
Read Register 7 (Not on NMOS) ................................................................................... 5-25
Read Register 8 ............................................................................................................. 5-26
Read Register 9 (ESCC and 85C30 Only) ..................................................................... 5-26
Read Register 10 ........................................................................................................... 5-26
Read Register 11 (ESCC and 85C30 Only) ................................................................... 5-27
Read Register 12 ........................................................................................................... 5-27
Read Register 13 ........................................................................................................... 5-27
Read Register 14 (ESCC and 85C30 Only) ................................................................... 5-27
Read Register 15 ........................................................................................................... 5-27
Chapter 6. Application Notes
Interfacing Z80® CPUs to the Z8500 Peripheral Family ......................................................................... 6-1
The Z180™ Interfaced with the SCC at MHZ........................................................................................ 6-34
The Zilog Datacom Family with the 80186 CPU .................................................................................. 6-59
SCC in Binary Synchronous Communications ...................................................................................... 6-79
Serial Communication Controller (SCC™): SDLC Mode of Operation .................................................. 6-93
Using SCC with Z8000 in SDLC Protocol6-105
Boost Your System Performance Using The Zilog ESCC™ ................................................................ 6-117
Technical Considerations When Implementing LocalTalk Link Access Protocol ................................ 6-131
On-Chip Oscillator Design................................................................................................................... 6-151
Chapter 7. Questions and Answers
Zilog SCC Z8030/Z8530 Questions and Answers................................................................................... 7-1
Zilog ESCC™ Controller Questions and Answers ................................................................................. 7-11
UM010901-0601
iii
5 Page 
USER’S MANUAL
1
CHAPTER 1
GENERAL DESCRIPTION
1.1 INTRODUCTION
The Zilog SCC Serial Communication Controller is a dual
channel, multiprotocol data communication peripheral de-
signed for use with 8- and 16-bit microprocessors. The
SCC functions as a serial-to-parallel, parallel-to-serial con-
verter/controller. The SCC can be software-configured to
satisfy a wide variety of serial communications applica-
tions. The device contains a variety of new, sophisticated
internal functions including on-chip baud rate generators,
digital phase-lock loops, and crystal oscillators, which dra-
matically reduce the need for external logic.
The SCC handles asynchronous formats, synchronous
byte-oriented protocols such as IBM® Bisync, and syn-
chronous bit-oriented protocols such as HDLC and IBM
SDLC. This versatile device supports virtually any serial
data transfer application (telecommunication, LAN, etc.)
The device can generate and check CRC codes in any
synchronous mode and can be programmed to check data
integrity in various modes. The SCC also has facilities for
modem control in both channels. In applications where
these controls are not needed, the modem controls can be
used for general-purpose I/O.
With access to 14 Write registers and 7 Read registers per
channel (the number of the registers varies depending on
the version), the user can configure the SCC to handle all
synchronous formats regardless of data size, number of
stop bits, or parity requirements.
Within each operating mode, the SCC also allows for pro-
tocol variations by checking odd or even parity bits, char-
acter insertion or deletion, CRC generation, checking
break and abort generation and detection, and many other
protocol-dependent features.
The SCC/ESCC family consists of the following seven
devices;
NMOS
CMOS
ESCC
EMSCC
Z-Bus®
Z8030
Z80C30
Z80230
Universal-Bus
Z8530
Z85C30
Z85230
Z85233
As a convention, use the following words to distinguish the
devices throughout this document.
SCC: Description applies to all versions.
NMOS: Description applies to NMOS version
(Z8030/Z8530)
CMOS: Description applies to CMOS version
(Z80C30/Z85C30)
ESCC: Description applies to ESCC
(Z80230/Z85230)
EMSCC: Description applies to EMSCC (Z85233)
Z80X30: Description applies to Z-Bus version of the
device (Z8030/Z80C30/Z80230)
Z85X3X: Description applies to Universal version of
the device (Z8530/Z85C30/Z85230/Z85233)
The Z-Bus version has a multiplexed bus interface and is
directly compatible with the Z8000, Z16C00 and 80x86
CPUs. The Universal version has a non-multiplexed bus
interface and easily interfaces with virtually any CPU, in-
cluding the 8080, Z80, 68X00.
UM010901-0601
1-1
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| PDF Descargar | [ Datasheet Z85233.PDF ] | |
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