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Z86C97 PDF даташит

Спецификация Z86C97 изготовлена ​​​​«Zilog.» и имеет функцию, называемую «CMOS Z8 MICROCONTROLLER».

Детали детали

Номер произв Z86C97
Описание CMOS Z8 MICROCONTROLLER
Производители Zilog.
логотип Zilog. логотип 

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Z86C97 Даташит, Описание, Даташиты
CUSTOMER PRODUCT SPECIFICATION
Z86C27/C97
CPS DC-2974-04
GENERAL DESCRIPTION
Z86C27-ROM
Z86C97-ROMLESS
CMOS Z8® 8-BIT
MICROCONTROLLER
The Z86C27 and Z86C97 Digital Television Controller
(DTC) introduce a new level of sophistication to single-chip
architecture. The Z86C27/C97 are members of the Z8
single-chip microcontroller family with 8 Kbytes of ROM
(Z86C27), ROMless (Z86C97) and 236 bytes of RAM. Both
devices are housed in a 64-pin DIP package, and are
CMOS compatible. Having the ROM/ROMless selectivity,
the DTC offers both external memory and pre-programmed
ROM which enables the Z8 microcontroller to be used in a
high volume production application device embedded
with a custom program (customer supplied program). The
Z86C97 ROMless offers the use of external memory rather
than a preprogrammed ROM. This enables the Z8
microcontroller to be used in prototyping, low volume
applications or where code flexibility is required. Zilog’s
DTC offers fast execution, efficient use of memory, sophis-
ticated interrupts, input/output bit manipulation capabili-
ties, and easy hardware/software system expansion along
with low cost and low power consumption. The device
provides an ideal performance and reliability solution for
consumer and industrial television applications.
The Z86C27/C97 architecture is characterized by utilizing
Zilog’s advanced Superintegration™ design methodol-
ogy. The devices have an 8-bit internal data path con-
trolled by a Z8 microcontroller, and On Screen Display
(OSD) logic circuits/Pulse Width Modulators (PWM). On-
chip peripherals include two register mapped I/O ports
(Ports 2 and Port 3), Interrupt control logic (1 software, 2
external and 3 internal interrupts) and a standby mode
recovery input port (Port 3, pin P30).
The OSD control circuits support 8 rows by 20 columns for
128 kinds of characters. The character color is specified
by row. One of the 8 rows is assigned to show two kinds of
colors for bar type displays such as volume control. The
OSD is capable of displaying either low resolution (5x7 dot
pattern) or high resolution (11x15 dot pattern) characters.
The Z86C97 currently supports high resolution char-
acters only.
A 14-bit PWM port provides enough voltage resolution for
a voltage synthesizer tuning system. Seven 6-bit PWM
ports are used for controlling audio signal level. Five 8-bit
PWM ports are used to vary picture levels.
The DTC applications demand powerful I/O capabilities.
The Z86C27/C97 fulfills this with 35 I/O pins dedicated to
input and output. These lines are grouped into five ports,
and are configurable under software control to provide
timing, status signals, parallel I/O and an address/data
bus for interfacing to external memory.
There are three basic address spaces available to support
this wide range of configurations: Program Memory, Reg-
ister File and Data Memory. The Register File is composed
of 236 bytes of general purpose register, two I/O Port
registers and 15 control and status registers.
To unburden the program from coping with the real-time
problems such as counting/timing and data communica-
tion, the DTC’s offer two on-chip counter/timers with a large
number of user selectable modes (see block diagram).
Note: All Signals with a preceding front slash, "/", are active
Low, e.g.: B//W (WORD is active Low); /B/W (BYTE is
active Low, only).
DC-2974-04 (6-10-93)
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Z86C97 Даташит, Описание, Даташиты
GENERAL DESCRIPTION (Continued)
XTAL1
XTAL2
/RESET
P30
P31
P34
P35
P36
P40( P10 )
P41( P11 )
P42( P12 )
P43( P13 )
P44( P14 )
P45( P15 )
P46( P16 )
P47( P17 )
P50( P00 )
P51( P01 )
P52( P02 )
P53( P03 )
P54( P04 )
P55( P05 )
P56( P06 )
P57( P07 )
P60( /AS )
P61( /DS )
P62( R//W )
P63( SCLK )
P64( P66 )*
P65( P67 )*
AFCIN
RESET
Oscillator
WDT
Counter
Timer
Counter
Timer
Port 3/
Interrupt
Port4
(Port 1)
Port 5
(Port 0)
Port 6
(Control)
8K Byte
Program ROM
Z8 CPU
Core
256 Byte
Register File
Port 0
Port 1
A8:15
AD0:7
160 Byte
Character RAM
4 KByte
Character ROM
* ( ) Denotes Z86C97 signal differences.
Functional Block Diagram
Z86C27/C97
CPS DC-2974-04
Port 2
PWM 1
14 -bit
PWM 2
to
PWM 8
6-bit
PWM 9
to
PWM 13
8-bit
On Screen
Display
P27
P26
P25
P24
P23
P22
P21
P20
PWM 1
PWM 2
PWM 3
PWM 4
PWM 5
PWM 6
PWM 7
PWM 8
PWM 9
PWM 10
PWM 11
PWM 12
PWM 13
OSCIN
OSCOUT
HSYNC
VSYNC
VRED
VGREEN
VBLUE
VBLANK
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Z86C97 Даташит, Описание, Даташиты
PIN CONFIGURATION
PWM5
PWM4
PWM3
PWM2
PWM1
P35
P36
P34
P31
P30
XTAL1
XTAL2
/RESET
P60
GND
P61
P62
VCC
P63
P64
P65
AFCIN
P50
P51
P52
P53
P54
P55
P56
P57
OSCIN
OSCOUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Z86C27
64 PWM6
63 PWM7
62 PWM8
61 PWM9
60 PWM10
59 PWM11
58 PWM12
57 PWM13
56 P27
55 P26
54 P25
53 P24
52 P23
51 GND
50 P22
49 P21
48 VCC
47 P20
46 P47
45 P46
44 P45
43 P44
42 P43
41 P42
40 P41
39 P40
38 VBLANK
37 VBLUE
36 VGREEN
35 VRED
34 VSYNC
33 HSYNC
Z86C27 Mask-ROM Plastic DIP
Z86C27/C97
CPS DC-2974-04
PWM5
PWM4
PWM3
PWM2
PWM1
P35
P36
P34
P31
P30
XTAL1
XTAL2
/RESET
/AS
GND
/DS
R//W
VCC
SCLK
P66
P67
AFCIN
P00
P01
P02
P03
P04
P05
P06
P07
OSCIN
OSCOUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Z86C97
64 PWM6
63 PWM7
62 PWM8
61 PWM9
60 PWM10
59 PWM11
58 PWM12
57 PWM13
56 P27
55 P26
54 P25
53 P24
52 P23
51 GND
50 P22
49 P21
48 VCC
47 P20
46 P17
45 P16
44 P15
43 P14
42 P13
41 P12
40 P11
39 P10
38 VBLANK
37 VBLUE
36 VGREEN
35 VRED
34 VSYNC
33 HSYNC
Z86C97 ROMless Plastic DIP
3










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