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PDF Z86E64 Data sheet ( Hoja de datos )

Número de pieza Z86E64
Descripción CMOS Z8 OTP Microcontroller
Fabricantes Zilog. 
Logotipo Zilog. Logotipo



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PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION
1
Z86E64
1
CMOS Z8 OTP MICROCONTROLLER
FEATURES
Device
ROM
(KB)
RAM*
(Bytes)
Z86E64 32 236
Note: *General-Purpose
I/O
Lines
52
Voltage
Range
4.5-5V
s Low-Power Consumption: 200 mW (max)
s Fast Instruction Pointer: 0.75 µs @ 16 MHz
s Two Standby Modes: STOP and HALT
s Full-Duplex UART
s All Digital Inputs are TTL Levels
s Auto Latches
s RAM and ROM Protect
s Two Programmable 8-Bit Counter/Timers,
Each with 6-Bit Programmable Prescaler
s Six Vectored, Priority Interrupts from Eight Different
Sources
s Low EMI Mode Option
s 68-Pin Leaded Chip-Carrier
GENERAL DESCRIPTION
The Z86E64 is a member of the Z8 single-chip microcon-
troller family. The Z86E64 can address both external mem-
ory and pre-programmed ROM, which enables this Z8
MCUTM to be used in high-volume applications where
code flexibility is required.
The Z86E64 is a pin compatible, One-Time-Programmable
(OTP) version of the Z86C64. The Z86E64 contains 32 KB
of EPROM memory in place of the 32 KB of ROM on the
Z86C64.
There are three basic address spaces available to support
this wide range of configuration: Program Memory, Data
Memory, and 236 general-purpose registers.
The Z86E64 offers a flexible I/O scheme, an efficient reg-
ister and address space structure, multiplexed capabilities
between address/data, I/O, and a number of ancillary fea-
tures that are useful in many industrial and advanced sci-
entific applications.
For applications demanding powerful I/O capabilities, the
Z86E64’s dedicated input and output lines are grouped
into six ports. Each port consists of eight lines, except port
6, which has four lines. Each port is configurable under
software control to provide timing, status signals, serial or
parallel I/O with or without handshake, and an address/da-
ta bus for interfacing external memory.
The Z86E64 offers two on-chip counter/timers with a large
number of user-selectable modes, and an Universal Asyn-
chronous Receiver/Transmitter (UART). See figure 1 for-
Functional Block description.
Note: All Signals with a preceding front slash, "/", are ac-
tive Low, for example: B//W (WORD is active Low); /B/W
(BYTE is active Low, only). Power connections follow con-
ventional descriptions below:
Connection
Power
Ground
Circuit
VCC
GND
Device
VDD
VSS
CP96DZ83200 (10/96)
PRELIMINARY
1

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Z86E64 pdf
DC CHARACTERISTICS
VCC = 4.5V to 5.5V
Sym
VCH
VCL
VIH
VIL
VOH
VOL
VRH
VRl
IIL
IOL
IIR
ICC
ICC1
ICC2
TA = 0°C to +70°C
Parameter
Min Max
Max Input Voltage
7
Max Input Voltage
12.5V
Clock Input High Voltage 3.8 VCC
Clock Input Low Voltage
–0.3
0.8
Input High Voltage
2.0 VCC
Input Low Voltage
Output High Voltage
Output Low Voltage
–0.3 0.8
2.4
0.4
Reset Input High Voltage
Reset Input Low Voltage
Input Leakage
3.8
–0.3
–10
VCC
0.8
10
Output Leakage
Reset Input Current
Supply Current
–10 10
–50
50
Standby Current
60
15
20
Standby Current
20
20
Typical at
25°C
25
35
5
10
5
5
Z86E64
CMOS Z8 OTP Microcontroller
1
Units Conditions
V IIN <250 µA
V P30-P33 Only in OTP mode
V Driven by External Clock Generator
V Driven by External Clock Generator
V
V
V IOH = –2.0 mA
V IOL = +2.0 mA
V
V
µA 0V < VIN < +5.25V
µA 0V < VIN < +5.25V
µA VCC= +5.25V, VRL = 0V
mA @ 12 MHz
mA @ 16 MHz
mA
mA HALT Mode VIN = 0V, VCC @ 16 MHz
µA STOP Mode VIN = 0V, VCC @ 12 MHz
µA STOP Mode VIN = 0V, VCC @ 16MHz
CP96DZ83200
PRELIMINARY
5

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Z86E64 arduino
Z86E64
CMOS Z8 OTP Microcontroller
1
Pre-Characterization Product:
The product represented by this CPS is newly introduced
and Zilog has not completed the full characterization of the
product. The CPS states what Zilog knows about this
product at this time, but additional features or non-
conformance with some aspects of the CPS may be found,
either by Zilog or its customers in the course of further
application and characterization work. In addition, Zilog
cautions that delivery may be uncertain at times, due to
start-up yield issues.
Low Margin:
Customer is advised that this product does not meet
Zilog's internal guardbanded test policies for the
specification requested and is supplied on an exception
basis. Customer is cautioned that delivery may be
uncertain and that, in addition to all other limitations on
Zilog liability stated on the front and back of the
acknowledgement, Zilog makes no claim as to quality and
reliability under the CPS. The product remains subject to
standard warranty for replacement due to defects in
materials and workmanship.
© 1996 by Zilog, Inc. All rights reserved. No part of this
document may be copied or reproduced in any form or by
any means without the prior written consent of Zilog, Inc.
The information in this document is subject to change
without notice. Devices sold by Zilog, Inc. are covered by
warranty and patent indemnification provisions appearing
in Zilog, Inc. Terms and Conditions of Sale only. Zilog, Inc.
makes no warranty, express, statutory, implied or by
description, regarding the information set forth herein or
regarding the freedom of the described devices from
intellectual property infringement. Zilog, Inc. makes no
warranty of merchantability or fitness for any purpose.
Zilog, Inc. shall not be responsible for any errors that may
appear in this document. Zilog, Inc. makes no commitment
to update or keep current the information contained in this
document.
Zilog’s products are not authorized for use as critical
components in life support devices or systems unless a
specific written agreement pertaining to such intended use
is executed between the customer and Zilog prior to use.
Life support devices or systems are those which are
intended for surgical implantation into the body, or which
sustains life whose failure to perform, when properly used
in accordance with instructions for use provided in the
labeling, can be reasonably expected to result in
significant injury to the user.
Zilog, Inc. 210 East Hacienda Ave.
Campbell, CA 95008-6600
Telephone (408) 370-8000
FAX 408 370-8056
Internet: http://www.zilog.com
CP96DZ83200
PRELIMINARY
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