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W27C4096P-12 PDF даташит

Спецификация W27C4096P-12 изготовлена ​​​​«Winbond» и имеет функцию, называемую «256K X 16 ELECTRICALLY ERASABLE EPROM».

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Номер произв W27C4096P-12
Описание 256K X 16 ELECTRICALLY ERASABLE EPROM
Производители Winbond
логотип Winbond логотип 

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W27C4096P-12 Даташит, Описание, Даташиты
Preliminary W27C4096
256K × 16 ELECTRICALLY ERASABLE EPROM
GENERAL DESCRIPTION
The W27C4096 is a high speed, low power Electrically Erasable and Programmable Read Only
Memory organized as 262144 × 16 bits that operates on a single 5 volt power supply. The W27C4096
provides an electrical chip erase function.
FEATURES
High speed access time:
120/150 nS (max.)
Read operating current: 30 mA (max.)
Erase/Programming operating current
30 mA (max.)
Standby current: 100 µA (max.)
Single 5V power supply
+14V erase/+12V programming voltage
Fully static operation
All inputs and outputs directly TTL/CMOS
compatible
Three-state outputs
Available packages: 40-pin 600 mil DIP, TSOP
and 44-pin PLCC
PIN CONFIGURATIONS
BLOCK DIAGRAM
VPP
CE
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
GND
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40-pin
DIP
40 VDD
39 A17
38 A16
37 A15
36 A14
35 A13
34 A12
33 A11
32 A10
31 A9
30 GND
29 A8
28 A7
27 A6
26 A5
25 A4
24 A3
23 A2
22 A1
21 A0
A9
A10
A11
A12
A13
A14
A15
A16
A17
VCC
VPP
CE
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
QQ
11
34
Q/
1C
5E
V
p
p
N
C
V
C
C
A
1
7
A
1
6
A
1
5
A
1
4
Q12
Q11
Q10
Q9
Q8
GND
NC
Q7
Q6
Q5
Q4
6 5 4 3 2 1 44 43 42 41 40
7 39
8 38
9 37
10 36
11 44-pin 35
12 PLCC 34
13 33
14 32
15 31
16 30
17 18
19
20
21
22
23 24
25
26
27
29
28
A13
A12
A11
A10
A9
GND
NC
A8
A7
A6
A5
Q QQ Q / NA A A A A
3 2 1 0 O C0 1 2 3 4
E
1
2
3
4
5
6
7
8
9
40-pin
10 TSOP
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
GND
A8
A7
A6
A5
A4
A3
A2
A1
A0
OE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
CE
CONTROL
OE
OUTPUT
BUFFER
Q0
.
.
Q15
A0
.
DECODER
.
A17
VCC
GND
VPP
CORE
ARRAY
PIN DESCRIPTION
SYMBOL
A0A17
Q0Q15
CE
OE
VPP
VCC
GND
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable
Output Enable
Program/Erase Supply Voltage
Power Supply
Ground
No Connection
Publication Release Date: March 1999
- 1 - Revision A1









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W27C4096P-12 Даташит, Описание, Даташиты
Preliminary W27C4096
FUNCTIONAL DESCRIPTION
Read Mode
Like conventional UVEPROMs, the W27C4096 has two control functions, both of which produce data
at the outputs. CE is for power control and chip select. OE controls the output buffer to gate data to
the output pins. When addresses are stable, the address access time (TACC) is equal to the delay
from CE to output (TCE), and data are available at the outputs TOE after the falling edge of OE , if
TACC and TCE timings are met.
Erase Mode
The erase operation is the only way to change data from "0" to "1." Unlike conventional UVEPROMs,
which use ultraviolet light to erase the contents of the entire chip (a procedure that requires up to half
an hour), the W27C4096 uses electrical erasure. Generally, the chip can be erased within 100 mS by
using an EPROM writer with a special erase algorithm.
Erase mode is entered when VPP is raised to VPE (14V), VCC = VCE (5V), CE low, OE high, A9 =
VPE (14V), A0 low, and all other address pins low and data input pins high.
Erase Verify Mode
After an erase operation, all of the words in the chip must be verified to check whether they have
been successfully erased to "1" or not. The erase verify mode automatically ensures a substantial
erase margin. This mode will be entered after the erase operation if VPP = VPE (14V), CE high, and
OE low.
Program Mode
Programming is performed exactly as it is in conventional UVEPROMs, and programming is the only
way to change cell data from "1" to "0." The program mode is entered when VPP is raised to VPP
(12V), VCC = VCP (5V), CE low, OE high, the address pins equal the desired address, and the input
pins equal the desired inputs.
Program Verify Mode
All of the words in the chip must be verified to check whether they have been successfully
programmed with the desired data or not. Hence, after each word is programmed, a program verify
operation should be performed. The program verify mode automatically ensures a substantial
program margin. This mode will be entered after the program operation if VPP = VPP (12V), CE high,
OE low and VCC = VCP (5V).
Erase/Program Inhibit
Erase or program inhibit mode allows parallel erasing or programming of multiple chips with different
data. When CE high , VPP = VPP/VPE (12V/14V), and VCC = 5V, erasing or programming of non-
target chips is inhibited, so that except for the CE and VPP, and VCC, the W27C4096 may have
common inputs.
-2-









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W27C4096P-12 Даташит, Описание, Даташиты
Preliminary W27C4096
Standby Mode
The standby mode significantly reduces VCC current. This mode is entered when CE high , VPP = 5V,
and VCC = 5V. In standby mode, all outputs are in a high impedance state, independent of OE.
Two-line Output Control
Since EPROMs are often used in large memory arrays, the W27C4096 provides two control inputs for
multiple memory connections. Two-line control provides for lowest possible memory power
dissipation and ensures that data bus contention will not occur.
System Considerations
EPROM power switching characteristics require careful device decoupling. System designers are
interested in three supply current issues: standby current levels (ISB), active current levels (ICC), and
transient current peaks produced by the falling and rising edges of CE. Transient current magnitudes
depend on the device output's capacitive and inductive loading. Two-line control and proper
decoupling capacitor selection will suppress transient voltage peaks. Each device should have a 0.1 µ
F ceramic capacitor connected between its VCC and GND. This high frequency, low inherent-
inductance capacitor should be placed as close as possible to the device. Additionally, for every eight
devices, a 4.7 µF electrolytic capacitor should be placed at the array's power supply connection
between VCC and GND. The bulk capacitor will overcome voltage slumps caused by PC board trace
inductances.
TABLE OF OPERATING MODES
(VPP = 12V, VPE = 14V, VHH = 12V, VCP = 5V, X = VIH or VIL)
MODE
PINS
Read
CE OE A0 A9 VCC VPP OUTPUTS
VIL
VIL X
X VCC VCC DOUT
Output Disable
VIL
VIH X
X VCC VCC High Z
Standby (TTL)
VIH
XX
X VCC VCC High Z
Standby (CMOS)
VCC ±0.3V X X
X VCC VCC High Z
Program
VIL
VIH X
X VCP VPP DIN
Program Verify
VIH
VIL X
X VCP VPP DOUT
Program Inhibit
VIH
XX
X VCP VPP High Z
Erase
VIL VIH VIL VPE VCE VPE DIH
Erase Verify
VIH
VIL X
X VCE VPE DOUT
Erase Inhibit
VIH
XX
X VCE VPE High Z
Product Identifier-manufacturer VIL VIL VIL VHH VCC VCC 00DA (Hex)
Product Identifier-device
VIL VIL VIH VHH VCC VCC 000D (Hex)
Publication Release Date: March 1999
- 3 - Revision A1










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