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PDF W42C31 Data sheet ( Hoja de datos )
| Número de pieza | W42C31 | |
| Descripción | Spread Spectrum Frequency Timing Generator | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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W42C31-03
Spread Spectrum Frequency Timing Generator
Features
• Maximized EMI suppression using Cypress’s Spread
Spectrum technology
• Generates a spread spectrum copy of the provided
input
• Integrated loop filter components
• Operates with a 5V supply
• Low power CMOS design
• Available in 8-pin SOIC (Small Outline Integrated
Circuit)
Overview
The W42C31-03 incorporates the latest advances in PLL
spread spectrum frequency synthesizer techniques. By fre-
quency modulating the output with a low-frequency carrier,
EMI is greatly reduced. Use of this technology allows systems
to pass increasingly difficult EMI testing without resorting to
costly shielding or redesign.
Simplified Block Diagram
5.0V
In a system, not only is EMI reduced in the various clock lines,
but also in all signals which are synchronized to the clock.
Therefore, the benefits of using this technology increase with
the number of address and data lines in the system. The Sim-
plified Block Diagram shows a simple implementation.
Table 1. Frequency Spread Selection
W42C31-03
FS1 FS0
00
01
10
11
Oscillator
Input
Frequency
(MHz)
10 to 20
10 to 20
20 to 33
20 to 33
XTAL Input
Frequency
(MHz)
Output
Frequency
(MHz)
10 to 20
10 to 20
20 to 25
20 to 25
fIN ±1.875%
fIN ±1.0%
fIN ±1.875%
fIN –2.0%
Pin Configuration
XTAL
Input
X1
X2 W42C31-03
Spread Spectrum
Output
(EMI suppressed)
X1
X2
GND
FS0
SOIC
1 8 OE#
2 7 FS1
3 6 VDD
4 5 CLKOUT
5.0V
Oscillator or Reference
Input
W42C31-03
Spread Spectrum
Output
(EMI suppressed)
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
September 28, 1999, rev. **
1 page  
W42C31-03
Application Information
Recommended Circuit Configuration
For optimum performance in system applications the power
supply decoupling scheme shown in Figure 4 should be used.
VDD decoupling is important to both reduce phase jitter and
EMI radiation. The 0.1-µF decoupling capacitor should be
placed as close to the VDD pin as possible, otherwise the in-
creased trace inductance will negate its decoupling capability.
The 10-µF decoupling capacitor shown should be a tantalum
type. For further EMI protection, the VDD connection can be
made via a ferrite bead, as shown.
The 6-pF XTAL load capacitors can be used to raise the inte-
grated 17-pF capacitance up to a total load of 20 pF on the
crystal.
Recommended Board Layout
Figure 5 shows a recommended 2-layer board layout.
C1
6 pF
C2
6 pF
XTAL1
GND
1
2
3
4
8
7
6 VDD
5
R1
Output
C3
0.1 µF
5V System Supply
FB
Figure 4. Recommended Circuit Configuration
C4
10 µF Tantalum
Optional Guard Ring for
XTAL Oscillator Circuitry
G
C1
G
C2
XTAL1
G
G
Power Supply Input
(5V)
FB
C1, C2 =
C3 =
C4 =
R1 =
XTAL load capacitors (optional; use
is not required for operation).
Typical value is 6 pF.
High frequency supply decoupling
capacitor (0.1-µF recommended).
Common supply low frequency
decoupling capacitor (10-µF tantalum
recommended).
Match value to line impedance
FB = Ferrite Bead
G = Via To GND Plane
C3
G
R1
C4
G
Clock Output
Figure 5. Recommended Board Layout (2-Layer Board)
Ordering Information
Ordering Code
Freq. Mask
Code
W42C31
03
Document #: 38-00802
Package
Name
G
Package Type
8-pin Plastic SOIC (150-mil)
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet W42C31.PDF ] | |
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