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W51300 PDF даташит

Спецификация W51300 изготовлена ​​​​«Winbond» и имеет функцию, называемую «FLASH VR CONTROLLER».

Детали детали

Номер произв W51300
Описание FLASH VR CONTROLLER
Производители Winbond
логотип Winbond логотип 

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W51300 Даташит, Описание, Даташиты
W51300
FLASH VR CONTROLLER
GENERAL DESCRIPTION
The W51300 is a voice recorder IC which contains A/D and D/A converters to digitize and reproduce
voice signals. An anti-alias/smoothing filter, AGC circuit, MIC preamplifier, and speaker power
amplifier are used to smooth the input voice and set the output voice to a certain volume while
minimizing the number of extra components needed. The recording time depends on the size of the
external memory.
The external memory is a nonvolatile flash EPROM that stores the voice data while power is switched
off. This external memory provides a great advantage in cartridge or greeting card applications. A
maximum of 16 Mbit of memory can be cascaded. In addition, the W51300's flexible segmentation,
selective recording/erasing, forward and backward move functions, and MCU interface provide
flexibility to meet the needs of a wide variety of applications.
FEATURES
Modified ADM algorithm with 24 KHz sampling frequency when ROSC = 620 K
Operates with Winbond serial flash EPROM
Built-in A/D, D/A, MIC preamplifier, AGC circuit, anti-alias/smoothing filter, speaker power amplifier,
and LED indicator
8 input trigger pins (L_REC, E_PLAY, L_PLAY, FWD, BWD, STOP, ERASE, RESET) debounced
to ensure noise-free operations
Single/multi-voice segment operation, normal/CPU mode selected by pin option (SMODE, CPU)
Cascadable for longer duration by directly cascading serial flash EPROMs (maximum 16 Mbits)
Maximum 63 voice segments available in multi-segment operation
Provides selective record, erase, and playback functions
Provides low power detection circuit at 3.0V
Provides both speaker direct drive and speaker current output (5 mA)
Low power consumption:
Operating: 15 mA (typ.)
Standby: 0.01 µA (typ.)
Publication Release Date: April 1997
- 1 - Revision A2









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W51300 Даташит, Описание, Даташиты
PIN CONFIGURATION
BWD
STOP
EOP
CLK
ADDR
DATA
CTRL
MODE
BUSY
LED
VSSD
VSSA
SPK-
SPK+
VCCA
AUD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 FWD
31 ERASE
30 E_PLAY
29 L_PLAY
28 L_REC
27 RESET
26 EXTCLK
25 TEST
24 SMODE
23 CPU
22 VCCD
21 AGC
20 MIC
19 MICREF
18 OSC
17 VCCA
PIN DESCRIPTION
NO. PIN I/O
1 BWD I/O
2 STOP I
3 EOP
I
4 CLK
O
5 ADDR O
6 DATA I/O
7 CTRL O
8 MODE O
DESCRIPTION
Message backward control pin in normal mode
Output clock signal (to MCU) in CPU mode
Stop playback control pin in normal mode
Input clock signal (from MCU) in CPU mode
End of page process signal (from flash EPROM)
Data clock pin for flash EPROM
Address clock pin for flash EPROM
Bidirectional data pin for flash EPROM
Control signal for flash EPROM
Mode control pin for flash EPROM
W51300
-2-









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W51300 Даташит, Описание, Даташиты
W51300
Pin Description, continued
NO. PIN
9 BUSY
10 LED
11 VSSD
12 VSSA
13 SPK-
14 SPK+
15 VCCA
16 AUD
17 VCCA
18 OSC
19 MICREF
20 MIC
21 AGC
22 VCCD
23 CPU
24 SMODE
25 TEST
26 EXTCLK
27 RESET
28 L_REC
29 L_PLAY
30 E_PLAY
31 ERASE
32 FWD
I/O DESCRIPTION
O Output busy signal, HIGH during playback
O Blink (Flash (volume-controlled) during playback
Flash Blink (3 Hz) when during low battery is low, segment full, or
memory full
ON during recording, erasing, and memory formatting
- Digital negative power supply
- Analog negative power supply
O Speaker voltage output -
O Speaker voltage output +
- Analog positive power supply
O Speaker current output (maximum 5 mA when VCC = 4.5V)
- Analog positive power supply +
I Oscillation frequency control pin
I Microphone reference
I Microphone input
I Automatic gain control input
- Digital positive power supply
I Normal/CPU mode select pin: low for normal, high for CPU
I Multi/single segment select pin: low for multi, high for single
I External test pin for testing
I External clock pin for testing
I Reset control pin
I Level record control pin
I Level playback control pin
I Edge playback control pin
I Message erase control pin in normal mode
Input level signal (from MCU) in CPU mode
I/O Message forward control pin in normal mode
Output level signal (to MCU) in CPU mode
Publication Release Date: April 1997
- 3 - Revision A2










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