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PDF W78E516B Data sheet ( Hoja de datos )
| Número de pieza | W78E516B | |
| Descripción | 8-BIT MICROCONTROLLER | |
| Fabricantes | Winbond | |
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W78E516B
8-BIT MICROCONTROLLER
GENERAL DESCRIPTION
The W78E516B is an 8-bit microcontroller which has an in-system programmable MTP-ROM for
firmware updating. The instruction set of the W78E516B is fully compatible with the standard 8052.
The W78E516B contains a 64K bytes of main MTP-ROM and a 4K bytes of auxiliary MTP-ROM
which allows the contents of the 64KB main MTP-ROM to be updated by the loader program located
at the 4KB auxiliary MTP-ROM; 512 bytes of on-chip RAM; four 8-bit bi-directional and bit-
addressable I/O ports; an additional 4-bit port P4; three 16-bit timer/counters; a serial port. These
peripherals are supported by a eight sources two-level interrupt capability. To facilitate programming
and verification, the MTP-ROM inside the W78E516B allows the program memory to be programmed
and read electronically. Once the code is confirmed, the user can protect the code for security.
The W78E516B microcontroller has two power reduction modes, idle mode and power-down mode,
both of which are software selectable. The idle mode turns off the processor clock but allows for
continued peripheral operation. The power-down mode stops the crystal oscillator for minimum power
consumption. The external clock can be stopped at any time and in any state without affecting the
processor.
FEATURES
• Fully static design 8-bit CMOS microcontroller up to 40 MHz.
• 64K bytes of in-system programmable MTP-ROM for Application Program (APROM).
• 4K bytes of auxiliary MTP-ROM for Loader Program (LDROM).
• 512 bytes of on-chip RAM. (including 256 bytes of AUX-RAM, software selectable)
• 64K bytes program memory address space and 64K bytes data memory address space.
• Four 8-bit bi-directional ports.
• One 4-bit multipurpose programmable port.
• Three 16-bit timer/counters
• One full duplex serial port
• Six-sources, two-level interrupt capability
• Built-in power management
• Code protection
• Packaged in
− DIP 40: W78E516B-24/40
− PLCC 44: W78E516BP-24/40
Publication Release Date: February 2000
- 1 - Revision A3
1 page  
W78E516B
• AUX-RAM 0H−255H is addressed indirectly as the same way to access external data memory with
the MOVX instruction. Address pointer are R0 and R1 of the selected register bank and DPTR
register. An access to external data memory locations higher than 255H will be performed with the
MOVX instruction in the same way as in the 8051. The AUX-RAM is disable after a reset. Setting
the bit 4 in CHPCON register will enable the access to AUX-RAM. When AUX-RAM is enabled the
instructions of "MOVX @Ri" will always access to on-chip AUX-RAM. When executing from internal
program memory, an access to AUX-RAM will not affect the Ports P0, P2, WR and RD .
Timers 0, 1, and 2
Timers 0, 1, and 2 each consist of two 8-bit data registers. These are called TL0 and TH0 for Timer
0, TL1 and TH1 for Timer 1, and TL2 and TH2 for Timer 2. The TCON and TMOD registers provide
control functions for timers 0, 1. The T2CON register provides control functions for Timer 2. RCAP2H
and RCAP2L are used as reload/capture registers for Timer 2. The operations of Timer 0 and Timer
1 are the same as in the W78C51. Timer 2 is a 16-bit timer/counter that is configured and controlled
by the T2CON register. Like Timers 0 and 1, Timer 2 can operate as either an external event counter
or as an internal timer, depending on the setting of bit C/T2 in T2CON. Timer 2 has three operating
modes: capture, auto-reload, and baud rate generator. The clock speed at capture or auto-reload
mode is the same as that of Timers 0 and 1.
Clock
The W78E516B is designed with either a crystal oscillator or an external clock. Internally, the clock is
divided by two before it is used by default. This makes the W78E516B relatively insensitive to duty
cycle variations in the clock.
Crystal Oscillator
The W78E516B incorporates a built-in crystal oscillator. To make the oscillator work, a crystal must
be connected across pins XTAL1 and XTAL2. In addition, a load capacitor must be connected from
each pin to ground, and a resistor must also be connected from XTAL1 to XTAL2 to provide a DC
bias when the crystal frequency is above 24 MHz.
External Clock
An external clock should be connected to pin XTAL1. Pin XTAL2 should be left unconnected. The
XTAL1 input is a CMOS-type input, as required by the crystal oscillator. As a result, the external clock
signal should have an input one level of greater than 3.5 volts.
Power Management
Idle Mode
Setting the IDL bit in the PCON register enters the idle mode. In the idle mode, the internal clock to
the processor is stopped. The peripherals and the interrupt logic continue to be clocked. The
processor will exit idle mode when either an interrupt or a reset occurs.
Power-down Mode
When the PD bit in the PCON register is set, the processor enters the power-down mode. In this
mode all of the clocks are stopped, including the oscillator. To exit from power-down mode is by a
hardware reset or external interrupts INT0 to INT1 when enabled and set to level triggered.
Reduce EMI Emission
The W78E516B allows user to diminish the gain of on-chip oscillator amplifier by using programmer
Publication Release Date: February 2000
- 5 - Revision A3
5 Page 
W78E516B
Part 2: 4KB LDROM
Go Procedure of Updating
the 64KB APROM
Timer Interrupt Service Routine:
Stop Timer & disable interrupt
PGM
Is F04KBOOT Mode?
(CHPCON.7=1)
Yes
No
Reset the CHPCON Register:
MOV CHPENR,#87H
MOV CHPENR,#59H
MOV CHPCON,#03H
Setting Timer and enable Timer
interrupt for wake-up .
(15 ms for erasing operation)
Setting erase operation mode:
MOV SFRCN,#22H
(Erase 64KB APROM)
Start Timer and enter IDLE
Mode.
(Erasing...)
End of erase
operation. CPU will
be wakened by Timer
interrupt.
End of Programming ?
Yes
No
Setting Timer and enable Timer
interrupt for wake-up .
(50us for program operation)
Get the parameters of new code
(Address and data bytes)
through I/O ports, UART or
other interfaces.
Is currently in the
F04KBOOT Mode ?
Yes
No
Software reset CPU and
re-boot from the 64KB
APROM.
MOV CHPENR,#87H
MOV CHPENR,#59H
MOV CHPCON,#83H
Setting control registers for
programming:
MOV SFRAH,#ADDRESS_H
MOV SFRAL,#ADDRESS_L
MOV SFRFD,#DATA
MOV SFRCN,#21H
Hardware Reset
to re-boot from
new 64 KB APROM.
(S/W reset is
invalid in F04KBOOT
Mode)
END
Executing new code
from address
00H in the 64KB APROM.
PGM
- 11 -
Publication Release Date: February 2000
Revision A3
11 Page | ||
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