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PDF W83626F Data sheet ( Hoja de datos )
| Número de pieza | W83626F | |
| Descripción | LPC-to-ISA Bridge | |
| Fabricantes | Winbond | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de W83626F (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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Winbond W83626F
LPC-to-ISA Bridge
1 page  
PIN CONFIGURATION FOR 626F
LPC TO ISA BRIDGE SET
W83626F/W83626D
PRELIMINARY
LA23
LA22
VCC5
LA21
LA20
LA19
LA18
GND
LA17
MEMR#
MEMW#
SD8
SD9
SD10
SD11
SD12
SD13
VCC5
SD14
SD15
MASTER#/RTCEN
DRQ7
GND
DACK7#
DRQ6
DACK6#/HEFRAS
11 1 99 9 9 999 99 9 88 888888 8 877 7 7 77 77 7 7 66 66 6
00 0 9 8 7 6 5 4 3 21 0 98 7 65 432 1 098 7 6 5 4 3 2 1 0 9 8 76 5
21 0
103 64
104 63
105 62
106 61
107 60
108 59
109 58
110
111
57
56
W83626F112 55
113 54
114 53
LPC to ISA115 52
116 51
117 50
118
119
120
121
122
49
48
47
46
45
123 44
124 43
125 42
126
127
41
40
128 39
1 1 1 1 1 1 1 1 1 12 2 2 2 22 2 2 2 2 3 3 3 3 3 3 33 3
1 2 34 5 6 7 8 9 0 1 2 3 4 5 6 7 8 90 1 2 3 45 6 7 8 9 0 1 2 3 4 5 67 8
GPIO5/IRQ8
GPIO4/PLED
GPIO3/IRQIN
IOCHRDY
GND
AEN
SA19
SA18
SA17
VCC5
SA16
SA15
SA14
SA13
GND
SA12
SA11
SA10
SA9
VCC5
SA8
SA7
SA6
SA5
GPIO2/MCCS#
GPIO1/KBCS#
Publication Release Date: Feb 2000
- 3 - Revision 0.50
5 Page 
LPC TO ISA BRIDGE SET
W83626F/W83626D
PRELIMINARY
Clock Buffer and Generator
SYMBOL PIN
I/O
14.318M
14MOUT 1
14MOUT 2
24.576M
25.000M
26 INt
27 OUT12t
28 OUT12t
29 OUT12t
FUNCTION
Main 14.318 MHz Clock Input.
14.318 MHz Buffer Output 1.
14.318 MHz Buffer Output 2.
This pin is weak pull-up during 3 VDD ramp-up period. The default
setting is 24.576 MHz and selected 25.000 MHz by external
pull-down with 4.7K ohm (recommended) during power ramp-up
period.
24.576 MHz Clock Output for Audio Codec or selected 25.000
MHz Clock Output for LAN on board solution.
Power Signals
SYMBOL
VCC5
VCC3
GND
AVCC3
AGND
PIN
5, 45, 55, 70, 85, 105, 120,
20
15, 50, 60, 80, 95, 110, 125
25
30
I/O
PWR
PWR
PWR
PWR
PWR
FUNCTION
Digital 5V Supply.
Digital 3.3V Supply.
Digital Ground.
Analog 3.3V Supply.
Analog Ground.
Power-on strapping Signals
SYMBOL
PIN
80PCS#/KBEN#
36
ROMCS#
MASTER/RTCEN#
37
123
DACK6#/HEFRAS
128
I/O
I/OD12t
I/OD12t
INt
I/OD24t
FUNCTION
Power-on strapping with
pulled-down register will enable
K/B and mouse functions. When it
is set, pin 38 , 39 and 40 will do
IRQ1, KBCS# and MCCS# signals.
If there is a boot-ROM (BIOS) ,the
signal must power-on with a weak
pulled-high register.
Power-on strapping with
pulled-down register will enable
RTC functions. When it is set, pin
64 and 65 will do IRQ8 and RTCCS#
signals.
Set this function will change the
port that is used to access
configuration-registers . Default
setting is 4Eh ,but by power-on
strapping with a pulled-down
register change to 2Eh.
Publication Release Date: Feb 2000
- 9 - Revision 0.50
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet W83626F.PDF ] | |
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