|
|
PDF W83L177R Data sheet ( Hoja de datos )
| Número de pieza | W83L177R | |
| Descripción | 100MHZ 2-DIMM SDRAM BUFFER FOR NOTEBOOK | |
| Fabricantes | Winbond | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de W83L177R (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
|
No Preview Available !
W83L177R
100MHZ 2-DIMM SDRAM BUFFER FOR NOTEBOOK
W83177R
Data Sheet Revision History
Pages
1 n.a.
2 n.a.
3
4
5
6
7
8
9
10
Dates Version
02/Apr
1.0
Version
On Web
n.a.
1.0
Main Contents
All of the versions before 0.50 are for internal use.
Change version and version on web site to 1.0
Please note that all data and specifications are subject to change without notice. All the trademarks of
products and companies mentioned in this data sheet belong to their respective owners.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where
malfunction of these products can reasonably be expected to result in personal injury. Winbond
customers using or selling these products for use in such applications do so at their own risk and
agree to fully indemnify Winbond for any damages resulting from such improper use or sales.
Publication Release Date: Mar. 1999
- 1 - Revision 1.0
1 page  
W83L177R
6.0 FUNTION DESCRIPTION
6.1 2-WIRE I2C CONTROL INTERFACE
The clock generator is a slave I2C component which can be read back the data stored in the
latches for verification. All proceeding bytes must be sent to change one of the control bytes. The 2-
wire control interface allows each clock output individually enabled or disabled. On power up, the
W83L177R initializes with default register settings, and then it ptional to use the 2-wire control
interface.
The SDATA signal only changes when the SDCLK signal is low, and is stable when SDCLK is high
during normal data transfer. There are only two exceptions. One is a high-to-low transition on
SDATA while SDCLK is high used to indicate the beginning of a data transfer cycle. The other is a
low-to-high transition on SDATA while SDCLK is high used to indicate the end of a data transfer cycle.
Data is always sent as complete 8-bit bytes followed by an acknowledge generated.
Byte writing starts with a start condition followed by 7-bit slave address and [1101 0010], command
code checking [0000 0000], and byte count checking. After successful reception of each byte, an
acknowledge (low) on the SDATA wire will be generated by the clock chip. Controller can start to
write to internal I2C registers after the string of data. The sequence order is as follows:
Bytes sequence order for I2C controller :
Clock Address
A(6:0) & R/W
Ack
8 bits dummy
Command code
Ack
8 bits dummy
Byte count
Ack
Byte0,1,2...
until Stop
Set R/W to 1 when read back the data sequence is as follows :
Clock Address
A(6:0) & R/W
Ack
Byte 0
Ack Byte 1
Ack
Byte2, 3, 4...
until Stop
6.2 SERIAL CONTROL REGISTERS
The Pin column lists the affected pin number and the @PowerUp column gives the state at true power
up. Registers are set to the values shown only on true power up. "Command Code" byte and "Byte
Count" byte must be sent following the acknowledge of the Address Byte. Although the data (bits)
in these two bytes are considered "don't care", they must be sent and will be acknowledge. After
that, the below described sequence (Register 0, Register 1, Register 2, ....) will be valid and
acknowledged.
Publication Release Date: Mar. 1999
- 5 - Revision 1.0
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet W83L177R.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| W83L177R | 100MHZ 2-DIMM SDRAM BUFFER FOR NOTEBOOK | Winbond |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |