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PDF WM8778 Data sheet ( Hoja de datos )
| Número de pieza | WM8778 | |
| Descripción | 24 BIT 192KHZ STEREO CODEC | |
| Fabricantes | Wolfson Microelectronics plc | |
| Logotipo |  |
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24-bit, 192kHz Stereo CODEC
WM8778
DESCRIPTION
The WM8778 is a high performance, stereo audio
CODEC. It is ideal for surround sound processing
applications for home hi-fi, DVD-RW and other audio
visual equipment.
The stereo 24-bit multi-bit sigma delta ADC has
programmable gain with automatic level control. Digital
audio output word lengths from 16-32 bits and sampling
rates from 32kHz to 96kHz are supported.
A stereo multi-bit sigma delta DAC is used with digital
audio input word lengths from 16-32 bits and sampling
rates from 32kHz to 192kHz. A multiplexor after the DAC
allows the selection of either an external analogue input
or DAC playback into the line outputs.
The WM8778 supports fully independent sample rates
for the ADC and DAC. The audio data interface supports
I2S, left justified, right justified and DSP formats.
The device is controlled in software via a 2 or 3 wire
serial interface which provides access to all features
including volume controls, mutes, and de-emphasis
facilities. It can also be controlled in hardware which
gives access to the most commonly used features.
Control interface selection is done via the MODE pin (tri-
level). The device is available in a 28-lead SSOP
package.
BLOCK DIAGRAM
FEATURES
• Audio Performance
− 108dB SNR (‘A’ weighted @ 48kHz) DAC
− 102dB SNR (‘A’ weighted @ 48kHz) ADC
• DAC Sampling Frequency: 32kHz – 192kHz
• ADC Sampling Frequency: 32kHz – 96kHz
• Stereo ADC input analogue gain adjust from +24dB to –21dB
in 0.5dB steps
• ADC digital gain from -21.5dB to -103dB in 0.5dB steps
• Programmable Automatic Level Control (ALC) or Limiter on
ADC input.
• Stereo DAC with analogue line outputs.
• 3-Wire SPI Compatible or 2-wire Serial Control Interface
• Hardware Control Mode
• Master or Slave Clocking Mode
• Programmable Audio Data Interface Modes
− I2S, Left, Right Justified or DSP
− 16/20/24/32 bit Word Lengths
• Analogue Bypass Path Feature
• 2.7V to 5.5V Analogue, 2.7V to 3.6V Digital supply Operation
APPLICATIONS
• Surround Sound AV Processors and Hi-Fi systems
• DVD-RW
WOLFSON MICROELECTRONICS plc
To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews/
Production Data, July 2008, Rev 4.2
Copyright © 2008 Wolfson Microelectronics plc
1 page  
Production Data
WM8778
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at
or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical
Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30°C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
CONDITION
Digital supply voltage
Analogue supply voltage
Voltage range digital inputs (MCLK, DIN, ADCLRC, DACLRC,
ADCBCLK, DACBCLK, DI, CL, CE and MODE)
Voltage range analogue inputs
Master Clock Frequency
Operating temperature range, TA
Storage temperature
Notes:
1. Analogue and digital grounds must always be within 0.3V of each other.
MIN
-0.3V
-0.3V
DGND -0.3V
AGND -0.3V
-25°C
-65°C
MAX
+3.63V
+7V
DVDD + 0.3V
AVDD +0.3V
37MHz
+85°C
+150°C
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PD, Rev 4.2, July 2008
5
5 Page 
Production Data
3-WIRE MPU INTERFACE TIMING
CE
tSCY
tSCH
tSCL
CL
WM8778
tCSL
tCSH
tCSS
tSCS
DI LSB
tDSU
tDHO
Figure 6 SPI Compatible (3-wire) Control Interface Input Timing (MODE=1)
Test Conditions
AVDD = 5V, DVDD = 3.3V, AGND, DGND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs unless otherwise stated
PARAMETER
CL rising edge to CE rising edge
CL pulse cycle time
CL pulse width low
CL pulse width high
DI to CL set-up time
CL to DI hold time
CE pulse width low
CE pulse width high
CE rising to CL rising
SYMBOL
tSCS
tSCY
tSCL
tSCH
tDSU
tDHO
tCSL
tCSH
tCSS
MIN
60
80
30
30
20
20
20
20
20
Table 4 3-wire SPI Compatible Control Interface Input Timing Information
TYP MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
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PD, Rev 4.2, July 2008
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet WM8778.PDF ] | |
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