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PDF 74HCT4520 Data sheet ( Hoja de datos )
| Número de pieza | 74HCT4520 | |
| Descripción | Dual 4-bit synchronous binary counter | |
| Fabricantes | Philips | |
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74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
Rev. 3 — 4 December 2014
Product data sheet
1. General description
The 74HC4520; 74HCT4520 are dual 4-bit internally synchronous binary counters with
two clock inputs (nCP0 and nCP1). They have buffered outputs from all 4 bit positions
(nQ0 to nQ3) and an asynchronous master reset input (nMR). The counter advances on
the LOW-to-HIGH transition of nCP0 when nCP1 is HIGH. It also advances on the
HIGH-to-LOW transition of nCP1 when nCP0 is LOW. Either nCP0 or nCP1 may be used
as the clock input to the counter. The other clock input may be used as a clock enable
input. A HIGH on nMR, resets the counter (nQ0 to nQ3 = LOW) independent of nCP0 and
nCP1. Inputs include clamp diodes. It enables the use of current limiting resistors to
interface inputs to voltages in excess of VCC.
2. Features and benefits
Complies with JEDEC standard no. 7A
Input levels:
For 74HC4520: CMOS level
For 74HCT4520: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
3. Applications
Multistage synchronous counting
Multistage asynchronous counting
Frequency dividers
1 page  
NXP Semiconductors
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
7. Functional description
Table 3.
nCP0
L
X
H
X
Function table[1]
nCP1
H
X
L
X
nMR
L
L
L
L
L
L
H
Mode
counter advances
counter advances
no change
no change
no change
no change
nQ0 to nQ3 = LOW
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; = positive-going transition; = negative-going transition.
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
VI < 0.5 V or VI > VCC + 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
VO = 0.5 V to VCC + 0.5 V
DIP16 package
SO16 package
0.5
-
-
-
-
50
65
[1] -
[1] -
+7.0
20
20
25
50
-
+150
750
500
V
mA
mA
mA
mA
mA
C
mW
mW
(T)SSOP16 package
[1] -
500 mW
[1] For DIP16 packages: above 70 C the value of Ptot derates linearly at 12 mW/K.
For SO16 packages: above 70 C the value of Ptot derates linearly at 8 mW/K.
For (T)SSOP16 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K.
74HC_HCT4520
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 4 December 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
5 of 19
5 Page 
NXP Semiconductors
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
Table 8. Measurement points
Type
Input
74HC4520
74HCT4520
VM
0.5 VCC
1.3 V
VI
GND to VCC
GND to 3 V
Output
VM
0.5 VCC
1.3 V
9,
QHJDWLYH
SXOVH
9
9,
SRVLWLYH
SXOVH
9
90
WI
WU
90
W:
W:
90
WU
WI
90
* 9,
9&&
'87
57
92
9&&
5/ 6
&/
RSHQ
DDG
Fig 8.
Test data is given in Table 9.
Test circuit definitions:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistance.
S1 = Test selection switch
Test circuit for measuring switching times
Table 9. Test data
Type
Input
74HC4520
74HCT4520
VI
VCC
3V
tr, tf
6 ns
6 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
RL
1 k
1 k
S1 position
tPHL, tPLH
open
open
74HC_HCT4520
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 4 December 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
11 of 19
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| PDF Descargar | [ Datasheet 74HCT4520.PDF ] | |
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