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Número de pieza | 74LCX126 | |
Descripción | Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de 74LCX126 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
No Preview Available ! September 2000
Revised July 2003
74LCX126
Low Voltage Quad Buffer
with 5V Tolerant Inputs and Outputs
General Description
The LCX126 contains four independent non-inverting buff-
ers with 3-STATE outputs. Each output is disabled when
the associated output-enable (OE) input is LOW. The
inputs tolerate voltages up to 7V allowing the interface of
5V systems to 3V systems.
The 74LCX126 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V–3.6V VCC specifications provided
s 5.5 ns tPD max (VCC = 3.3V), 10 µA ICC max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s ±24 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 100V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to GND through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number Package Number
Package Description
74LCX126M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LCX126SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX126MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An
OEn
On
Description
Inputs
Output Enable Inputs
Outputs
Truth Table
Inputs
Output
OEn
An
On
HL L
HHH
LXZ
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
© 2003 Fairchild Semiconductor Corporation DS500386
www.fairchildsemi.com
1 page Schematic Diagram Generic for LCX Family
5 www.fairchildsemi.com
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet 74LCX126.PDF ] |
Número de pieza | Descripción | Fabricantes |
74LCX125 | Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs | Fairchild Semiconductor |
74LCX125 | Low-voltage CMOS quad bus buffer | STMicroelectronics |
74LCX125FT | Low-Voltage Quad Bus Buffer | Toshiba |
74LCX126 | Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs | Fairchild Semiconductor |
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