74LCX541 PDF даташит
Спецификация 74LCX541 изготовлена «ST Microelectronics» и имеет функцию, называемую «Low voltage CMOS octal bus buffer». |
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Детали детали
Номер произв | 74LCX541 |
Описание | Low voltage CMOS octal bus buffer |
Производители | ST Microelectronics |
логотип |
17 Pages
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74LCX541
Low voltage CMOS octal bus buffer (3-state)
with 5V tolerant inputs and outputs
Features
■ 5V tolerant inputs and outputs
■ High speed:
– tPD = 8.0ns (Max) at VCC = 3V
)■ Power down protection on inputs and outputs
t(s■ Symmetrical output impedance:
uc– |IOH| = IOL = 24mA (Min) at VCC = 3V
d■ PCI bus levels guaranteed at 24mA
ro■ Balanced propagation delays:
P– tPLH ≅ tPHL
te■ Operating voltage range:
ole– VCC (Opr) = 2.0V to 3.6V
s■ Pin and function compatible with
b74 series 541
O■ Latch-up performance exceeds
) -500mA (JESD 17)
t(s■ ESD performance:
c– HBM > 2000V
Obsolete Produ(MIL STD 883 method 3015); MM > 200V
SO-20
TSSOP20
Description
The 74LCX541 is a low voltage CMOS octal bus
buffer (non-inverted) fabricated with sub-micron
silicon gate and double-layer metal wiring C2MOS
technology. It is ideal for low power and high
speed 3.3V applications; it can be interfaced to
5V signal environment for both inputs and
outputs.
The 3 STATE control gate operates as two input
AND such that if either G1 and G2 are high, all
eight outputs are in the high impedance state. In
order to enhance PC board layout the 74LCX541
offers a pinout having inputs and outputs on
opposite sides of the package.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Order codes
Part number
74LCX541MTR
74LCX541TTR
January 2007
Package
SO-20
TSSOP20
Rev 5
Packaging
Tape and reel
Tape and reel
1/17
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Contents
Contents
74LCX541
1 Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Logic states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
t(s)3.1 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
uc4 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
rod4.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
te P5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
ole6 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Obs7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
t(s) -8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Obsolete Produc9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
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74LCX541
Logic symbols and I/O equivalent circuit
1 Logic symbols and I/O equivalent circuit
Figure 1. IEC logic symbols
Obsolete Product(s) - Obsolete Product(s)Figure 2. Input and output equivalent circuit
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