74LCX760 PDF даташит
Спецификация 74LCX760 изготовлена «Fairchild Semiconductor» и имеет функцию, называемую «Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs». |
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Детали детали
Номер произв | 74LCX760 |
Описание | Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs |
Производители | Fairchild Semiconductor |
логотип |
10 Pages
No Preview Available ! |
July 2001
Revised February 2002
74LCX760
Low Voltage Buffer/Line Driver
with 5V Tolerant Inputs and Open Drain Outputs
General Description
The LCX760 is the Open Drain version of the LCX244. The
LCX760 contains eight non-inverting buffers with 3-STATE
outputs. The device may be employed as a memory
address driver, clock driver and bus-oriented transmitter/
receiver. The LCX760 is designed for low voltage (2.5V or
3.3V) VCC applications with capability of interfacing to a 5V
signal environment.
The LCX760 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s Open drain version of the LCX244
s 5V tolerant inputs and outputs
s 2.3V–3.6V VCC specifications provided
s 8.0 ns tPD max (VCC = 3.3V), 10 µA ICC max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s 24 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up conforms to JEDEC JED78
s ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number Package Number
Package Description
74LCX760WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74LCX760SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 4.4mm Wide
74LCX760MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LCX760MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
© 2002 Fairchild Semiconductor Corporation DS500413
www.fairchildsemi.com
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Pin Descriptions
Pin Names
OE1, OE2
I0–I7
O0–O7
Description
3-STATE Output Enable Inputs
Inputs
Outputs
Truth Tables
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Inputs
OE1
L
L
H
Inputs
OE2
L
L
H
In
L
H
X
In
L
H
X
Outputs
(Pins 12, 14, 16, 18)
L
H
Z
Outputs
(Pins 3, 5, 7, 9)
L
H
Z
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Absolute Maximum Ratings(Note 2)
Symbol
Parameter
VCC Supply Voltage
VI DC Input Voltage
VO DC Output Voltage
IIK DC Input Diode Current
IOK DC Output Diode Current
IO
ICC
IGND
TSTG
DC Output Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
Value
−0.5 to +7.0
−0.5 to +7.0
−0.5 to +7.0
−50
−50
+50
50
±100
±100
−65 to +150
Conditions
Output in HIGH or LOW State (Note 3)
VI < GND
VO < GND
VO > VCC
Units
V
V
V
mA
mA
mA
mA
mA
°C
Recommended Operating Conditions (Note 4)
Symbol
Parameter
Min
Max
Units
VCC Supply Voltage
Operating
Data Retention
2.0
1.5
3.6
3.6
V
VI Input Voltage
0 5.5 V
VO Output Voltage
0 5.5 V
IOL Output Current
VCC = 3.0V − 3.6V
24
VCC = 2.7V − 3.0V
12 mA
VCC = 2.3V − 2.7V
8
TA Free-Air Operating Temperature
−40 85
°C
∆t/∆V
Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V
0 10 ns/V
Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operating Conditions” table will define the conditions for actual device operation.
Note 3: IO Absolute Maximum Rating must be observed.
Note 4: Unused inputs or I/Os must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
Parameter
VIH HIGH Level Input Voltage
VIL LOW Level Input Voltage
VOL LOW Level Output Voltage
II Input Leakage Current
IOZ 3-STATE Output Leakage
IOFF Power-Off Leakage Current
ICC Quiescent Supply Current
∆ICC
Increase in ICC per Input
IOHZ
Off State Current
Note 5: Outputs disabled or 3-STATE only.
Conditions
IOL = 100 µA
IOL = 8 mA
IOL = 12 mA
IOL = 16 mA
IOL = 24 mA
0 ≤ VI ≤ 5.5V
0 ≤ VO ≤ 5.5V
VI = VIH or VIL
VI or VO = 5.5V
VI = VCC or GND
3.6V ≤ VI, VO ≤ 5.5V (Note 5)
VIH = VCC −0.6V
VO = 5.5
VCC
(V)
2.3 − 2.7
2.7 − 3.6
2.3 − 2.7
2.7 − 3.6
2.3 − 3.6
2.3
2.7
3.0
3.0
2.3 − 3.6
2.3 − 3.6
0
2.3 − 3.6
2.3 − 3.6
2.3 − 3.6
2 - 3.6
TA = −40°C to +85°C
Min Max
1.7
2.0
0.7
0.8
0.2
0.6
0.4
0.4
0.55
±5.0
±5.0
10
10
±10
500
10
Units
V
V
V
µA
µA
µA
µA
µA
µA
3 www.fairchildsemi.com
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Номер в каталоге | Описание | Производители |
74LCX760 | Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs | Fairchild Semiconductor |
74LCX760MSA | Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs | Fairchild Semiconductor |
74LCX760MTC | Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs | Fairchild Semiconductor |
74LCX760SJ | Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs | Fairchild Semiconductor |
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