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PDF 74LS168 Data sheet ( Hoja de datos )
| Número de pieza | 74LS168 | |
| Descripción | BCD DECADE/MODULO 16 BINARY SYNCHRONOUS BI-DIRECTIONAL COUNTERS | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 74LS168 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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BCD DECADE/MODULO
16 BINARY SYNCHRONOUS
BI-DIRECTIONAL COUNTERS
The SN54 / 74LS168 and SN54 / 74LS169 are fully synchronous 4-stage
up/down counters featuring a preset capability for programmable operation,
carry lookahead for easy cascading and a U/ D input to control the direction
of counting. The SN54 / 74LS168 counts in a BCD decade (8, 4, 2, 1)
sequence, while the SN54 / 74LS169 operates in a Modulo 16 binary
sequence. All state changes, whether in counting or parallel loading, are
initiated by the LOW-to-HIGH transition of the clock.
• Low Power Dissipation 100 mW Typical
• High-Speed Count Frequency 30 MHz Typical
• Fully Synchronous Operation
• Full Carry Lookahead for Easy Cascading
• Single Up / Down Control Input
• Positive Edge-Trigger Operation
• Input Clamp Diodes Limit High-Speed Termination Effects
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC
16
TC
15
Q0
14
Q1
13
Q2
12
Q3
11
CET
10
PE
9
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
1
U/D
2
CP
3
P0
4
P1
5
P2
6
P3
78
CEP GND
PIN NAMES
LOADING (Note a)
HIGH
LOW
CEP Count Enable Parallel (Active LOW) Input
0.5 U.L. 0.25 U.L.
CET Count Enable Trickle (Active LOW) Input
1.0 U.L.
0.5 U.L.
CP Clock Pulse (Active positive going edge) Input 0.5 U.L. 0.25 U.L.
PE Parallel Enable (Active LOW) Input
0.5 U.L. 0.25 U.L.
U/D Up-Down Count Control Input
0.5 U.L. 0.25 U.L.
P0–P3 Parallel Data Inputs
Q0–Q3 Flip-Flop Outputs
TC Terminal Count (Active LOW) Output
0.5 U.L.
10 U.L.
10 U.L.
0.25 U.L.
5 (2.5) U.L.
5 (2.5) U.L.
NOTES:
a. 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.
b. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
b. Temperature Ranges.
SN54/74LS168
SN54/74LS169
BCD DECADE/ MODULO
16 BINARY SYNCHRONOUS
BI-DIRECTIONAL COUNTERS
LOW POWER SCHOTTKY
16
1
J SUFFIX
CERAMIC
CASE 620-09
16
1
N SUFFIX
PLASTIC
CASE 648-08
16
1
D SUFFIX
SOIC
CASE 751B-03
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
LOGIC SYMBOL
93
4
56
1
7
10
2
PE
U/D
P0
P1
CEP
CET
P2 P3
TC
CP
Q0 Q1 Q2 Q3
15
14 13 12 11
VCC = PIN 16
GND = PIN 8
FAST AND LS TTL DATA
5-302
1 page  
SN54/74LS168 • SN54/74LS169
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)
Limits
Symbol
Parameter
Min Typ Max
fMAX
Maximum Clock Frequency
25 32
tPLH
tPHL
Propagation Delay,
Clock to TC
23 35
23 35
tPLH
tPHL
Propagation Delay,
Clock to any Q
13 20
15 23
tPLH
tPHL
Propagation Delay,
CET to TC
15 20
15 20
tPLH
tPHL
Propagation Delay,
U / D to TC
17 25
19 29
AC SETUP REQUIREMENTS (TA = 25°C)
Symbol
tW
ts
ts
ts
th
Parameter
Clock Pulse Width
Setup Time,
Data or Enable
Setup Time
PE
Setup Time
U/D
Hold Time
Any Input
Limits
Min Typ Max
25
20
25
30
0
Unit
MHz
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
Test Conditions
VCC = 5.0 V
CL = 15 pF
Test Conditions
VCC = 5.0 V
FAST AND LS TTL DATA
5-306
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 74LS168.PDF ] | |
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