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PDF 74LS221 Data sheet ( Hoja de datos )
| Número de pieza | 74LS221 | |
| Descripción | LOW POWER SCHOTTKY | |
| Fabricantes | ON Semiconductor | |
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SN74LS221
Dual Monostable
Multivibrators with
Schmitt-Trigger Inputs
Each multivibrator of the LS221 features a negative-transition-
triggered input and a positive-transition-triggered input either of
which can be used as an inhibit input.
Pulse triggering occurs at a voltage level and is not related to the
transition time of the input pulse. Schmitt-trigger input circuitry for B
input allows jitter-free triggering for inputs as slow as 1 volt / second,
providing the circuit with excellent noise immunity. A high immunity
to VCC noise is also provided by internal latching circuitry.
Once triggered, the outputs are independent of further transitions of
the inputs and are a function of the timing components. The output
pulses can be terminated by the overriding clear. Input pulse width
may be of any duration relative to the output pulse width. Output pulse
width may be varied from 35 nanoseconds to a maximum of 70 s by
choosing appropriate timing components. With Rext = 2.0 kΩ and Cext
= 0, a typical output pulse of 30 nanoseconds is achieved. Output rise
and fall times are independent of pulse length.
Pulse width stability is achieved through internal compensation and
is virtually independent of VCC and temperature. In most applications,
pulse stability will only be limited by the accuracy of external timing
components.
Jitter-free operation is maintained over the full temperature and VCC
ranges for greater than six decades of timing capacitance (10 pF to 10
µF), and greater than one decade of timing resistance (2.0 to 100 kΩ
for the SN74LS221). Pulse width is defined by the relationship:
tw(out) = CextRext ln 2.0 ≈ 0.7 Cext Rext; where tW is in ns if Cext is in
pF and Rext is in kΩ . If pulse cutoff is not critical, capacitance up to
1000 µF and resistance as low as 1.4 kΩ may be used. The range of
jitter-free pulse widths is extended if VCC is 5.0 V and 25°C
temperature.
• SN74LS221 is a Dual Highly Stable One-Shot
• Overriding Clear Terminates Output Pulse
• Pin Out is Identical to SN74LS123
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min Typ Max Unit
VCC Supply Voltage
TA Operating Ambient
Temperature Range
4.75 5.0 5.25
V
0 25 70 °C
IOH Output Current – High
IOL Output Current – Low
– 0.4
8.0
mA
mA
http://onsemi.com
LOW
POWER
SCHOTTKY
16
1
PLASTIC
N SUFFIX
CASE 648
16
1
SOIC
D SUFFIX
CASE 751B
ORDERING INFORMATION
Device
Package
Shipping
SN74LS221N 16 Pin DIP 2000 Units/Box
SN74LS221D
16 Pin
2500/Tape & Reel
© Semiconductor Components Industries, LLC, 1999
December, 1999 – Rev. 6
1
Publication Order Number:
SN74LS221/D
1 page  
SN74LS221
AC CHARACTERISTICS (VCC = 5.0 V, TA = 25°C)
Symbol
From
(Input)
To
(Output)
Min
Limits
Typ
Max
AQ
45 70
tPLH
BQ
35 55
AQ
50 80
tPHL
BQ
40 65
tPHL
Clear
Q
35 55
tPLH
Clear
Q
44 65
70 120 150
tW(out)
A or B
Q or Q
20 47 70
600 670 750
6.0 6.9 7.5
Unit
ns
ns
ns
ns
ns
ms
AC SETUP REQUIREMENTS (VCC = 5.0 V, TA = 25°C)
Symbol
dv/dt
Parameter
Rate of Rise or Fall of Input Pulse
Input Pulse Width
tW
ts Clear-Inactive-State Setup Time
Rext External Timing Resistance
Cext External Timing Capacitance
Output Duty Cycle
Schmitt, B
Logic Input, A
A or B, tW(in)
Clear, tW (clear)
RT = 2.0 kΩ
RT = MAX Rext
Test Conditions
CL = 15 pF,
See Figure 1
Cext = 80 pF, Rext = 2.0 Ω
Cext = 80 pF, Rext = 2.0 Ω
Cext = 0, Rext = 2.0 kΩ
Cext = 100 pF, Rext = 10 kΩ
Cext = 1.0 µF, Rext = 10 kΩ
Limits
Min Typ
Max
1.0
1.0
40
40
15
1.4 100
0 1000
50
90
Unit
V/s
V/µs
ns
ns
kΩ
µF
%
http://onsemi.com
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 74LS221.PDF ] | |
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