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74LV423 PDF даташит

Спецификация 74LV423 изготовлена ​​​​«Philips» и имеет функцию, называемую «Dual retriggerable monostable multivibrator with reset».

Детали детали

Номер произв 74LV423
Описание Dual retriggerable monostable multivibrator with reset
Производители Philips
логотип Philips логотип 

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74LV423 Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
74LV423
Dual retriggerable monostable
multivibrator with reset
Product specification
IC24 Data Handbook
1997 Feb 04
Philips
Semiconductors









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74LV423 Даташит, Описание, Даташиты
Philips Semiconductors
Dual retriggerable monostable multivibrator
with reset
Preliminary specification
74LV423
FEATURES
Optimized for Low Voltage applications: 1.0 to 5.5V
Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V
Typical VOLP (output ground bounce) t 0.8V @ VCC = 3.3V,
Tamb = 25°C
Typical VOHV (output VOH undershoot) u 2V @ VCC = 3.3V,
Tamb = 25°C
DC triggered from active HIGH or active LOW inputs
Retriggerable for very long pulses up to 100% duty factor
Direct reset terminates output pulses
Schmitt-trigger action on all inputs except for the reset input
Output capability: standard (except for nREXT/CEXT)
ICC category: MSI
QUICK REFERENCE DATA
GND = 0V; Tamb = 25°C; tr = tf v2.5 ns
SYMBOL
PARAMETER
DESCRIPTION
The 74LV423 is a low-voltage Si-gate CMOS device and is pin and
function compatible with the 74HC/HCT423.
The 74LV423 is a dual retriggerable monostable multivibrator with
output pulse width control by three methods. The basic pulse time is
programmed by selection of an external resistor (REXT) and
capacitor (CEXT). They are normally connected as shown in
Figure 1. Once triggered, the basic output pulse width may be
extended by retriggering the gated active LOW-going edge input
(nA) or the active HIGH-going edge input (nB). By repeating this
process, the output pulse period (nQ = HIGH, nQ = LOW) can be
made as long as desired. Alternatively, an output delay can be
terminated at any time by a LOW-going edge on input nRD, which
also inhibits the triggering. Figures 2 and 3 illustrate pulse control by
retriggering and early reset. The basic output pulse width is
essentially determined by the values of the external timing
components REXT and CEXT. For pulse width when CEXT <10000pF,
see Figure 6. When CEXT u 10,000pF, the typical output pulse
width is defined as: tW = 0.45 REXT CEXT (typ.), where
tW = pulse width in ns; REXT = external resistor in K; and
CEXT = external capacitor in pF. Schmitt-trigger action in the nA and
nB inputs makes the circuit highly tolerant of slower input rise and
fall times.
CONDITIONS
TYPICAL
UNIT
tPHL/tPLH
Propagation delay
nA, nB to nQ, nQ
nRD to nQ, nQ
CL = 15pF
VCC = 3.3V
REXT = 5K
CEXT = 0pF
CI Input capacitance
CPD Power dissipation capacitance per flip-flop VCC = 3.3V, VI = GND to VCC1
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD VCC2 fi )S (CL VCC2 fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
S (CL VCC2 fo) = sum of the outputs.
16
13
3.5
17
ns
ns
pF
pF
ORDERING INFORMATION
PACKAGES
16-Pin Plastic DIL
16-Pin Plastic SO
16-Pin Plastic SSOP Type II
16-Pin Plastic TSSOP Type I
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +125°C
74LV423 N
–40°C to +125°C
74LV423 D
–40°C to +125°C
74LV423 DB
–40°C to +125°C
74LV423 PW
NORTH AMERICA
74LV423 N
74LV423 D
74LV423 DB
74LV423PW DH
PKG. DWG. #
SOT38-1
SOT109-1
SOT338-1
SOT403-1
1997 Feb 04
2 853–1913 17724









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74LV423 Даташит, Описание, Даташиты
Philips Semiconductors
Dual retriggerable monostable multivibrator
with reset
Preliminary specification
74LV423
PIN CONFIGURATION
1A 1
1B 2
1RD 3
1Q 4
2Q 5
2CEXT 6
2REXT/CEXT 7
GND 8
16 VCC
15 1REXT/CEXT
14 1CEXT
13 1Q
12 2Q
11 2RD
10 2B
9 2A
SV00096
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1,9
1A, 2A
Trigger inputs
(negative-edge triggered)
2,10
1B, 2B
Trigger inputs
(positive-edge triggered)
3,11
4, 12
1RD, 2RD
1Q, 2Q
Direct reset LOW
Outputs (active LOW)
7 2REXT/CEXT External resistor/capacitor connection
8
GND
Ground (0V)
13, 5
1Q, 2Q Outputs (active HIGH)
14, 6
15
16
1CEXT,
2CEXT
1REXT/CEXT
VCC
External capacitor connection
External resistor/capacitor connection
Positive supply voltage
LOGIC SYMBOL (IEEE/IEC)
14 CX
15 RCX
1&
2
3R
6 CX
7 RCX
9&
10
11 R
13
4
5
12
SV00161
LOGIC SYMBOL
1 1A
9 2A
2 1B
10 2B
3 1RD
11 2RD
1CEXT 14
2CEXT 6
1REXT/CEXT 15
2REXT/CEXT 7
S
Q
T
Q
1Q 13
2Q 5
1Q 4
2Q 12
RD
SV00160
FUNCTIONAL DIAGRAM
1CEXT 14
2CEXT 6
1REXT/CEXT 15
2REXT/CEXT 7
1 1A
9 2A
2 1B
10 2B
3 1RD
11 2RD
S
Q
T
Q
1Q 13
2Q 5
1Q 4
2Q 12
RD
SV00162
1997 Feb 04
3










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74LV423Dual retriggerable monostable multivibrator with resetPhilips
Philips

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