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PI74ALVCH1622601 PDF даташит

Спецификация PI74ALVCH1622601 изготовлена ​​​​«ETC» и имеет функцию, называемую «18-Bit Universal Bus Transceiver With 3-State Outputs».

Детали детали

Номер произв PI74ALVCH1622601
Описание 18-Bit Universal Bus Transceiver With 3-State Outputs
Производители ETC
логотип ETC логотип 

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PI74ALVCH1622601 Даташит, Описание, Даташиты
PI74ALVCH1622601
1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
18-Bit Universal Bus Transceiver
With 3-State Outputs
Product Features
PI74ALVCH1622601is designed for low voltage operation
VCC=2.3Vto3.6V
Hysteresis on all inputs
Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
Inputs/Outputs have equivalent 26series resistors,
no external resistors are required.
Bus Hold retains last active bus state during 3-state
eliminates the need for external pullup resistors
Industrial operation at –40°C to +85°C
Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
Logic Block Diagram
Product Description
Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced in the Company’s advanced 0.5 micron CMOS technology,
achieving industry leading speed.
The PI74ALVCH1622601 uses D-type latches and D-type flip-
flops with 3-state outputs to allow data flow in transparent, latched,
and clocked modes.
Data flow in each direction is controlled by Output Enable (OEAB
and OEBA), Latched Enable (LEAB and LEBA), and Clock
(CLKAB and CLKBA) inputs. The clock can be controlled by the
Clock Enable (CLKENAB and CLKENBA) inputs. For A-to-B
data flow, the device operates in the transparent mode when LEAB
is HIGH. When LEAB is LOW, the A data is latched if CLKAB is
held at a high or low logic level. If LEAB is low, the A-bus is stored
in the latch/flip-flop on the low-to-high transition of CLKAB.
When OEAB is low, the outputs are active. When OEAB is HIGH,
the outputs are in the high-impedance state.
Data flow for B to A is similar to that of A to B but uses OEBA,
LEBA, CLKBA, and CLKENBA.
To reduce overshoot and undershoot, the inputs/outputs include
26series resistors.
To ensure the high-impedance state during power up or power
down, OE should be tied to Vcc through a pull-up resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
The PI74ALVCH1622601 has “Bus Hold” which retains the data
input’s last state whenever the data input goes to high-impedance
preventing “floating” inputs and eliminating the need for pullup/
down resistors.
1 PS8115B 02/03/98









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PI74ALVCH1622601 Даташит, Описание, Даташиты
PI74ALVCH1622601
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Product Pin Description
Pin Name
CLKEN
OE
LE
CLK
Ax
Bx
GND
VCC
Description
Clock Enable Input (Active LOW)
Output Enable Input (Active LOW)
Latch Enable (Active HIGH)
Clock Input (Active HIGH)
Data I/O
Data I/O
Ground
Power
Product Pin Configuration
OEAB
LEAB
A1
GND
A2
A3
VCC
A4
A5
A6
GND
A7
A8
A9
A10
A11
A12
GND
A13
A14
A15
VCC
A16
A17
GND
A18
OEBA
LEBA
1 56
2 55
3 54
4 53
5 52
6 51
7 56-PIN 50
8 A-56 49
V-56
9 48
10 47
11 46
12 45
13 44
14 43
15 42
16 41
17 40
18 39
19 38
20 37
21 36
22 35
23 34
24 33
25 32
26 31
27 30
28 29
CLKENAB
CLKAB
B1
GND
B2
B3
VCC
B4
B5
B6
GND
B7
B8
B9
B10
B11
B12
GND
B13
B14
B15
VCC
B16
B17
GND
B18
CLKBA
CLKENBA
Truth Table(1)
Inputs
Output
CLKENAB OEAB LEAB CLKAB A
B
X
HX
X XZ
X
LH
X LL
X
LH
S HH
H
LL
X X B0‡
H
LL
X X B0‡
L
LL
­ LL
L
LL
­ HH
L
LL
L X B0‡
L
LL
H X B0§
Notes:
1. H = High Signal Level
L = Low Signal Level
Z = High Impedance
= LOW-to-HIGH Transition
† A-to-B data flow is shown:
B-to-A flow is similar but uses OEBA, LEBA,
CLKBA, and CLKENBA.
‡ Output level before the indicated steady-state input
conditions were established.
§ Output level before the indicated steady-state input
conditions were established, provided that CLKAB is
LOW before LEAB goes LOW.
2 PS8115B 02/03/98









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PI74ALVCH1622601 Даташит, Описание, Даташиты
PI74ALVCH1622601
12345678901234567890123456789012123456789012345678901234567890121234567890123456718890-1B23I4T567U89N01I21V23E45R67S89A01L234B56U78S901T23R45A678N90S12C12E34I5V67E89R012
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................................. –65°C to +150°C
Ambient Temperature with Power Applied ................. –40°C to +85°C
Input Voltage Range, VIN ..................................... –0.5V to VCC +0.5V
Output Voltage Range, VOUT ............................... –0.5V to VCC +0.5V
DC Input Voltage .......................................................... –0.5V to +5.0V
DC Output Current ...................................................................... 100mA
Power Dissipation .......................................................................... 1.0W
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions above those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect reliability.
Recommended Operating Conditions(1)
Parameters
Description
Test Conditions
Min. Typ.
VCC Supply Voltage
2.3
VCC = 2.3V to 2.7V 1.7
VIH Input HIGH Voltage
VCC = 2.7V to 3.6V 2.0
VCC = 2.3V to 2.7V
VIL Input LOW Voltage
VCC = 2.7V to 3.6V
VIN Input Voltage
0
VOUT
Output Voltage
0
VCC = 2.3V
IOH High-level Output Current VCC = 2.7V
VCC = 3.0V
VCC = 2.3V
IOL Low-level Output Current VCC = 2.7V
VCC = 3.0V
TA
Operating Free-Air Temperature
-40
Note:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
Max. Units
3.6
0.7 V
0.8
VCC
VCC
-6
-8
-12
mA
6
8
12
85 °C
3 PS8115B 02/03/98










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