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PDF 74LVC1G384 Data sheet ( Hoja de datos )
| Número de pieza | 74LVC1G384 | |
| Descripción | Bilateral switch | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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Philips Semiconductors
74LVC1G384
Bilateral switch
Rev. 01 — 26 February 2004
74LVC1G384
Bilateral switch
Product data sheet
1. General description
The 74LVC1G384 is a high-speed Si-gate CMOS device.
The 74LVC1G384 provides an analog switch. The switch has input and output terminals
(pins Y and Z) and an active LOW enable input (pin E). When pin E is HIGH, the analog
switch is turned off.
2. Features
s Very low ON-resistance:
x 7.5 Ω (typ) at VCC = 2.7 V
x 6.5 Ω (typ) at VCC = 3.3 V
x 6.0 Ω (typ) at VCC = 5 V.
s ESD protection:
x HBM EIA/JESD22-A114-A exceeds 2 000 V
x MM EIA/JESD22-A115-A exceeds 200 V.
s High noise immunity
s CMOS low power consumption
s Direct interface TTL-levels
s Latch-up performance meets requirements of JESD78 Class I
s Multiple package options
s Specified from −40 °C to +80 °C and −40 °C to +125 °C.
3. Quick reference data
Table 1: Quick reference data
Ground = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns.
Symbol Parameter
Conditions
tPZH, tPZL turn-on time E to Y or Z
CL = 50 pF; RL = 500 Ω
VCC = 3.3 V
tPHZ, tPLZ turn-off time E to Y or Z
VCC = 5.0 V
CL = 50 pF; RL = 500 Ω
VCC = 3.3 V
VCC = 5.0 V
CI input capacitance
Min Typ Max Unit
- 4.8 - ns
- 3.3 - ns
- 5.4 - ns
- 3.6 - ns
- 2 - pF
9397 750 12675
Product data sheet
Rev. 01 — 26 February 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
1 of 22
1 page  
Philips Semiconductors
74LVC1G384
Bilateral switch
11. Static characteristics
Table 8: Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Tamb = −40 °C to +85 °C [1]
VIH HIGH-level input
voltage
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
0.65 × VCC
1.7
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
2.0
0.7 × VCC
VIL
LOW-level input
VCC = 1.65 V to 1.95 V
voltage
VCC = 2.3 V to 2.7 V
-
-
VCC = 2.7 V to 3.6 V
-
VCC = 4.5 V to 5.5 V
ILI input leakage current VI = 5.5 V or GND; VCC = 5.5 V
on control pin
-
[2] -
IS(OFF)
IS(ON)
ICC
∆ICC
analog switch
OFF-state current
analog switch
ON-state current
quiescent supply
current
additional quiescent
supply current per
control pin
VI = VIH or VIL; |VS| = VCC − GND;
VCC = 5.5 V; see Figure 5
VI = VIH or VIL; |VS| = VCC − GND;
VCC = 5.5 V; see Figure 6
VI = VCC or GND; VS = GND or VCC;
IO = 0 A; VCC = 5.5 V
VI = VCC − 0.6 V; VS = GND or VCC;
IO = 0 A; VCC = 5.5 V
[2] -
[2] -
[2] -
[2] -
CI input capacitance
-
RON(peak) switch ON-state
resistance (peak)
VI = GND to VCC; see Figure 7 and
Figure 8
IS = 4 mA; VCC = 1.65 V to 1.95 V
IS = 8 mA; VCC = 2.3 V to 2.7 V
-
-
IS = 12 mA; VCC = 2.7 V
-
IS = 24 mA; VCC = 3.0 V to 3.6 V
-
IS = 32 mA; VCC = 4.5 V to 5.5 V
-
RON(rail) switch ON-state
resistance rail
VI = GND
IS = 4 mA; VCC = 1.65 V to 1.95 V
-
IS = 8 mA; VCC = 2.3 V to 2.7 V
-
IS = 12 mA; VCC = 2.7 V
-
IS = 24 mA; VCC = 3.0 V to 3.6 V
IS = 32 mA; VCC = 4.5 V to 5.5 V
-
-
VI = VCC
IS = 4 mA; VCC = 1.65 V to 1.95 V
-
IS = 8 mA; VCC = 2.3 V to 2.7 V
-
IS = 12 mA; VCC = 2.7 V
-
IS = 24 mA; VCC = 3.0 V to 3.6 V
-
IS = 32 mA; VCC = 4.5 V to 5.5 V
-
Typ
-
-
-
-
-
-
-
-
±0.1
±0.1
±0.1
0.1
5
2
35
14
11.5
8.5
6.5
10
8.5
7.5
6.5
6
12
8.5
7.5
6.5
6
Max
-
-
-
-
0.35 × VCC
0.7
0.8
0.3 × VCC
±5
±5
±5
10
500
-
130
30
25
20
15
30
20
18
15
10
30
20
18
15
10
Unit
V
V
V
V
V
V
V
V
µA
µA
µA
µA
µA
pF
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
9397 750 12675
Product data sheet
Rev. 01 — 26 February 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
5 of 22
5 Page 
Philips Semiconductors
74LVC1G384
Bilateral switch
Table 9: Dynamic characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); test circuit Figure 12.
Symbol Parameter
Conditions
Min Typ Max
tPHZ, tPLZ
turn-off time E to Y or Z
see Figure 11
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
1.0 -
1.0 -
1.0 -
1.0 -
1.0 -
13.0
9.0
9.5
8.5
6.5
Unit
ns
ns
ns
ns
ns
[1] All typical values are measured at Tamb = 25 °C.
[2] tPHL and tPLH propagation delay is the calculated RC time constant of the typical switch ON-resistance of the switch and the specified
capacitance when driven by an ideal voltage source (zero output impedance).
[3] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + (CL + CS)× VCC2 × fo where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS = maximum switch capacitance in pF;
VCC = supply voltage in V.
[4] The condition is VI = GND to VCC.
13. Waveforms
Y or Z input
VI
GND
VOH
Z or Y output
VOL
VM
t PHL
VM
t PLH
mna667
Measurement points are given in Table 10.
Logic levels: VOL and VOH are typical output voltage drop that occur with the output load.
Fig 10. Input (Y or Z) to output (Z or Y) propagation delays.
Table 10: Measurement points
Supply voltage Input
VCC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VM
0.5 × VCC
0.5 × VCC
1.5 V
3.0 V to 3.6 V
1.5 V
4.5 V to 5.5 V
0.5 × VCC
Output
VM
0.5 × VCC
0.5 × VCC
1.5 V
1.5 V
0.5 × VCC
9397 750 12675
Product data sheet
Rev. 01 — 26 February 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
11 of 22
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet 74LVC1G384.PDF ] | |
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