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PDF 74LVC244A Data sheet ( Hoja de datos )

Número de pieza 74LVC244A
Descripción Octal buffer/line driver
Fabricantes NXP Semiconductors 
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74LVC244A; 74LVCH244A
Octal buffer/line driver; 3-state
Rev. 8 — 26 June 2013
Product data sheet
1. General description
The 74LVC244A; 74LVCH244A is an octal non-inverting buffer/line driver with 3-state
outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE.
A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.
Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise
and fall times.
Inputs can be driven from either 3.3 V or 5.0 V devices. In 3-state operation, outputs can
handle 5 V. These features allow the use of these devices as translators in a mixed
3.3 V and 5 V environment.
The 74LVCH244A bus hold on data inputs eliminates the need for external pull-up
resistors to hold unused inputs.
2. Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low-power consumption
Direct interface with TTL levels
Inputs accept voltages up to 5.5 V
High-impedance when VCC = 0 V
Bus hold on all data inputs (74LVCH244A only)
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from 40 C to +85 C and 40 C to +125 C

1 page




74LVC244A pdf
NXP Semiconductors
74LVC244A; 74LVCH244A
Octal buffer/line driver; 3-state
6. Functional description
Table 3.
Control
nOE
L
L
H
Function table [1]
Input
nAn
L
H
X
Output
nYn
L
H
Z
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Max Unit
VCC supply voltage
IIK
input clamping current
VI < 0 V
VI input voltage
IOK
output clamping current
VO > VCC or VO < 0 V
VO output voltage
output HIGH or LOW
output 3-state
0.5
50
[1] 0.5
-
[2] 0.5
[2] 0.5
+6.5
-
+6.5
50
VCC + 0.5
+6.5
V
mA
V
mA
V
V
IO
ICC
IGND
Tstg
Ptot
output current
supply current
ground current
storage temperature
total power dissipation
VO = 0 V to VCC
Tamb = 40 C to +125 C
-
-
100
65
[3] -
50
100
-
+150
500
mA
mA
mA
C
mW
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO20 packages: above 70 C derate linearly with 8 mW/K.
For (T)SSOP20 packages: above 60 C derate linearly with 5.5 mW/K.
For DHVQFN20 and DHXQFN20 packages: above 60 C derate linearly with 4.5 mW/K.
74LVC_LVCH244A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 26 June 2013
© NXP B.V. 2013. All rights reserved.
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74LVC244A arduino
NXP Semiconductors
74LVC244A; 74LVCH244A
Octal buffer/line driver; 3-state
12. Package outline
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
y
Z
20
D
c
11
EA
X
HE v M A
pin 1 index
1
e
10
wM
bp
A2
A1
Q
(A3)
A
Lp
L
detail X
θ
0 5 10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
UNIT max. A1 A2 A3 bp
c
D (1) E (1)
e
HE
L
Lp
Q
mm
2.65
0.3
0.1
2.45
2.25
0.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
inches
0.1
0.012 0.096
0.004 0.089
0.01
0.019 0.013
0.014 0.009
0.51
0.49
0.30
0.29
0.05
0.419
0.394
0.055
0.043
0.016
0.043
0.039
v
0.25
0.01
w y Z (1)
0.25 0.1
0.9
0.4
0.01
0.004
0.035
0.016
θ
8o
0o
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
OUTLINE
VERSION
SOT163-1
IEC
075E04
REFERENCES
JEDEC
JEITA
MS-013
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 9. Package outline SOT163-1 (SO20)
74LVC_LVCH244A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 26 June 2013
© NXP B.V. 2013. All rights reserved.
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