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74LVC2G126 PDF даташит

Спецификация 74LVC2G126 изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «Dual bus buffer/line driver».

Детали детали

Номер произв 74LVC2G126
Описание Dual bus buffer/line driver
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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74LVC2G126 Даташит, Описание, Даташиты
74LVC2G126
Dual bus buffer/line driver; 3-state
Rev. 12 — 8 April 2013
Product data sheet
1. General description
The 74LVC2G126 is a dual non-inverting buffer/line driver with 3-state outputs. Each
3-state output is controlled by an output enable input (pin nOE). A LOW-level at pin nOE
causes the output to assume a high-impedance OFF-state. Schmitt trigger action at all
inputs makes the circuit highly tolerant of slower input rise and fall times.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the
74LVC2G126 as a translator in a mixed 3.3 V and 5 V environment.
It is fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables the output, preventing a damaging backflow current through the device when it is
powered down.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C









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74LVC2G126 Даташит, Описание, Даташиты
NXP Semiconductors
74LVC2G126
Dual bus buffer/line driver; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74LVC2G126DP 40 C to +125 C TSSOP8
74LVC2G126DC 40 C to +125 C VSSOP8
74LVC2G126GT 40 C to +125 C XSON8
74LVC2G126GF 40 C to +125 C XSON8
74LVC2G126GD 40 C to +125 C XSON8
74LVC2G126GM 40 C to +125 C XQFN8
74LVC2G126GN 40 C to +125 C XSON8
74LVC2G126GS 40 C to +125 C XSON8
Description
Version
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
SOT505-2
plastic very thin shrink small outline package; 8 leads; SOT765-1
body width 2.3 mm
plastic extremely thin small outline package; no leads; SOT833-1
8 terminals; body 1 1.95 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 1 0.5 mm
SOT1089
plastic extremely thin small outline package; no leads; SOT996-2
8 terminals; body 3 2 0.5 mm
plastic, extremely thin quad flat package; no leads;
8 terminals; body 1.6 1.6 0.5 mm
SOT902-2
extremely thin small outline package; no leads;
8 terminals; body 1.2 1.0 0.35 mm
SOT1116
extremely thin small outline package; no leads;
8 terminals; body 1.35 1.0 0.35 mm
SOT1203
4. Marking
Table 2. Marking codes
Type number
74LVC2G126DP
74LVC2G126DC
74LVC2G126GT
74LVC2G126GF
74LVC2G126GD
74LVC2G126GM
74LVC2G126GN
74LVC2G126GS
Marking code[1]
V26
V26
V26
VN
V26
V26
VN
VN
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
74LVC2G126
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 8 April 2013
© NXP B.V. 2013. All rights reserved.
2 of 22









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74LVC2G126 Даташит, Описание, Даташиты
NXP Semiconductors
5. Functional diagram
74LVC2G126
Dual bus buffer/line driver; 3-state
1A
1OE
2A
2OE
Fig 1. Logic symbol
1Y
2Y
001aah787
6. Pinning information
6.1 Pinning
nA nY
nOE
Fig 2. Logic diagram (one gate)
mna234
74LVC2G126
1OE 1
1A 2
2Y 3
GND 4
8 VCC
7 2OE
6 1Y
5 2A
001aab740
Fig 3. Pin configuration SOT505-2 and SOT765-1
74LVC2G126
1OE 1
8 VCC
1A 2
7 2OE
2Y 3
6 1Y
GND 4
5 2A
001aab741
Transparent top view
Fig 4. Pin configuration SOT833-1, SOT1089,
SOT1116 and SOT1203
74LVC2G126
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 8 April 2013
© NXP B.V. 2013. All rights reserved.
3 of 22










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