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PDF 74LVC2G17GV Data sheet ( Hoja de datos )

Número de pieza 74LVC2G17GV
Descripción Dual non-inverting Schmitt-trigger with 5 V tolerant input
Fabricantes Integrated Circuit Systems 
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INTEGRATED CIRCUITS
DATA SHEET
74LVC2G17
Dual non-inverting Schmitt-trigger
with 5 V tolerant input
Product specification
2003 Aug 13

1 page




74LVC2G17GV pdf
Philips Semiconductors
Dual non-inverting Schmitt-trigger with
5 V tolerant input
Product specification
74LVC2G17
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VCC
VI
VO
Tamb
tr, tf
PARAMETER
supply voltage
input voltage
output voltage
operating ambient temperature
input rise and fall times
CONDITIONS
VCC = 1.65 to 2.7 V
VCC = 2.7 to 5.5 V
MIN.
1.65
0
0
40
0
0
MAX.
5.5
5.5
VCC
+125
20
10
UNIT
V
V
V
°C
ns/V
ns/V
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
VCC
IIK
VI
IOK
VO
PARAMETER
supply voltage
input diode current
input voltage
output diode current
output voltage
IO
ICC, IGND
Tstg
PD
output source or sink current
VCC or GND current
storage temperature
power dissipation
CONDITIONS
MIN.
VI < 0
note 1
0.5
0.5
VO > VCC or VO < 0
active mode; notes 1 and 2
0.5
Power-down mode; notes 1 and 2 0.5
VO = 0 to VCC
65
Tamb = 40 to +125 °C
MAX.
UNIT
+6.5 V
50 mA
+6.5 V
±50
VCC + 0.5
+6.5
mA
V
V
±50
±100
+150
mA
mA
°C
300 mW
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
2003 Aug 13
5

5 Page





74LVC2G17GV arduino
Philips Semiconductors
Dual non-inverting Schmitt-trigger with
5 V tolerant input
Product specification
74LVC2G17
AC WAVEFORMS
handbook, halfpage VI
nA input
GND
tPLH
VOH
nY output
VOL
VM
VM
VM
tPHL
VM
MNB072
VCC
VM
1.65 to 1.95 V 0.5 × VCC
2.3 to 2.7 V 0.5 × VCC
2.7 V
1.5 V
3.0 to 3.6 V 1.5 V
4.5 to 5.5 V 0.5 × VCC
INPUT
VI
VCC
VCC
2.7 V
2.7 V
VCC
tr = tf
2.0 ns
2.0 ns
2.5 ns
2.5 ns
2.5 ns
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.8 The input (nA) to output (nY) propagation delays and the output transition times.
handbook, full pagewidth
VCC
PULSE
GENERATOR
VI
D.U.T.
VO
RT
VEXT
RL
CL RL
MNA616
VCC
1.65 to 1.95 V
2.3 to 2.7 V
2.7 V
3.0 to 3.6 V
4.5 to 5.5 V
VI
VCC
VCC
2.7 V
2.7 V
VCC
CL
30 pF
30 pF
50 pF
50 pF
50 pF
RL
1 k
500
500
500
500
tPLH/tPHL
open
open
open
open
open
VEXT
tPZH/tPHZ
GND
GND
GND
GND
GND
tPZL/tPLZ
2 × VCC
2 × VCC
6V
6V
2 × VCC
Definitions for test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.9 Load circuitry for switching times.
2003 Aug 13
11

11 Page







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