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PDF 74LVC3G17DC Data sheet ( Hoja de datos )
| Número de pieza | 74LVC3G17DC | |
| Descripción | Triple non-inverting Schmitt trigger with 5 V tolerant input | |
| Fabricantes | NXP Semiconductors | |
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74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
Rev. 03 — 31 January 2005
Product data sheet
1. General description
The 74LVC3G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device
and superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device as translator in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry
disables the output, preventing the damaging backflow current through the device when it
is powered down.
The 74LVC3G17 provides three non-inverting buffers with Schmitt-trigger action. It is
capable of transforming slowly changing input signals into sharply defined, jitter-free
output signals.
2. Features
s Wide supply voltage range from 1.65 V to 5.5 V
s 5 V tolerant input/output for interfacing with 5 V logic
s High noise immunity
s ESD protection:
x HBM EIA/JESD22-A114-B exceeds 2000 V
x MM EIA/JESD22-A115-A exceeds 200 V.
s ±24 mA output drive (VCC = 3.0 V)
s CMOS low power consumption
s Latch-up performance exceeds 250 mA
s Direct interface with TTL levels
s Multiple package options
s Specified from −40 °C to +85 °C and −40 °C to +125 °C.
3. Applications
s Wave and pulse shapers for highly noisy environments.
1 page  
Philips Semiconductors
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
11. Recommended operating conditions
Table 7:
Symbol
VCC
VI
VO
Tamb
Recommended operating conditions
Parameter
Conditions
supply voltage
input voltage
output voltage
ambient temperature
Min Typ
1.65 -
0-
0-
−40 -
Max Unit
5.5 V
5.5 V
VCC V
+125 °C
12. Static characteristics
Table 8: Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Tamb = −40 °C to +85 °C [1]
VOL
LOW-level output
VI = VIH or VIL
voltage
IO = 100 µA;
VCC = 1.65 V to 5.5 V
-
IO = 4 mA; VCC = 1.65 V
-
IO = 8 mA; VCC = 2.3 V
-
IO = 12 mA; VCC = 2.7 V
-
IO = 24 mA; VCC = 3.0 V
IO = 32 mA; VCC = 4.5 V
-
-
VOH
HIGH-level output
VI = VIH or VIL
voltage
IO = −100 µA;
VCC = 1.65 V to 5.5 V
IO = −4 mA; VCC = 1.65 V
IO = −8 mA; VCC = 2.3 V
IO = −12 mA; VCC = 2.7 V
IO = −24 mA; VCC = 3.0 V
IO = −32 mA; VCC = 4.5 V
VCC − 0.1
1.2
1.9
2.2
2.3
3.8
ILI
input leakage current VI = 5.5 V or GND; VCC = 5.5 V
-
Ioff
power-off leakage
VI or VO = 5.5 V; VCC = 0 V
current
-
ICC
∆ICC
quiescent supply
current
additional quiescent
supply current per pin
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
VI = VCC − 0.6 V; IO = 0 A;
VCC = 2.3 V to 5.5 V
-
-
CI input capacitance
-
Typ
-
-
-
-
-
-
-
-
-
-
-
-
±0.1
±0.1
0.1
5
3.5
Max
0.1
0.45
0.3
0.4
0.55
0.55
-
-
-
-
-
-
±5
±10
10
500
-
Unit
V
V
V
V
V
V
V
V
V
V
V
V
µA
µA
µA
µA
pF
9397 750 14544
Product data sheet
Rev. 03 — 31 January 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
5 of 16
5 Page 
Philips Semiconductors
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
18. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2
D
y
Z
8
5
c
E AX
HE v M A
pin 1 index
1
e
4
bp w M
A A2
A1
(A3)
detail X
Lp
L
θ
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
mm
1.1
0.15
0.00
0.95
0.75
0.25
0.38
0.22
0.18
0.08
D(1)
3.1
2.9
E(1) e
3.1
2.9
0.65
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
HE
4.1
3.9
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT505-2
---
L Lp v w y Z(1)
0.5
0.47
0.33
0.2
0.13
0.1
0.70
0.35
θ
8°
0°
EUROPEAN
PROJECTION
ISSUE DATE
02-01-16
Fig 12. Package outline SOT505-2 (TSSOP8)
9397 750 14544
Product data sheet
Rev. 03 — 31 January 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
11 of 16
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| PDF Descargar | [ Datasheet 74LVC3G17DC.PDF ] | |
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