74LVQ244SJ PDF даташит
Спецификация 74LVQ244SJ изготовлена «Fairchild Semiconductor» и имеет функцию, называемую «Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs». |
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Детали детали
Номер произв | 74LVQ244SJ |
Описание | Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs |
Производители | Fairchild Semiconductor |
логотип |
6 Pages
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May 1998
74LVQ244
Low Voltage Octal Buffer/Line Driver with 3-STATE
Outputs
General Description
The LVQ244 is an octal buffer and line driver designed to be
employed as a memory address driver, clock driver and bus
oriented transmitter or receiver which provides improved PC
board density.
Features
n Ideal for low power/low noise 3.3V applications
n Implements patented EMI reduction circuitry
n Available in SOIC JEDEC, SOIC EIAJ and QSOP
packages
n Guaranteed simultaneous switching noise level and
dynamic threshold performance
n Improved latch-up immunity
n Guaranteed incident wave switching into 75Ω
n 4 kV minimum ESD immunity
Ordering Code:
Order Number
74LVQ244SC
74LVQ244SJ
74LVQ244QSC
Package Number
M20B
M20D
MQA20
Package Description
20-Lead (0.300" Wide) Molded Small Outline Package, SOIC, JEDEC
20-Lead Shrink Molded Small Outline Package, SOIC, EIAJ
20-Lead (0.150" Wide) Molded Shrink Small Outline Package, SSOP, JEDEC
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Assignment for SOIC and QSOP
DS011356-1
DS011356-2
© 1998 Fairchild Semiconductor Corporation DS011356
www.fairchildsemi.com
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Truth Tables
Pin Descriptions
Inputs
OE1
L
In
L
LH
HX
Outputs
(Pins 12, 14, 16, 18)
L
H
Z
Inputs
Outputs
OE2
L
In
L
(Pins 3, 5, 7, 9)
L
LH
H
HX
Z
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Pin Names
OE1, OE2
I0– I7
O0– O7
Description
3-STATE Output Enable Inputs
Inputs
Outputs
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Absolute Maximum Ratings (Note 1)
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
VI = VCC + 0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VO = −0.5V
VO = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source
or Sink Current (IO)
DC VCC or Ground Current
(ICC or IGND)
Storage Temperature (TSTG)
DC Latch-Up Source or
Sink Current
−0.5V to +7.0V
−20 mA
+20 mA
−0.5V to VCC + 0.5V
−20 mA
+20 mA
−0.5V to VCC + 0.5V
±50 mA
±400 mA
−65˚C to +150˚C
±300 mA
DC Electrical Characteristics
Recommended Operating
Conditions (Note 2)
Supply Voltage (VCC)
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
Minimum Input Edge Rate ∆V/∆t
2.0V to 3.6V
0V to VCC
0V to VCC
−40˚C to +85˚C
VIN from 0.8V to 2.0V
VCC @ 3.0V
125 mV/ns
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be op-
erated at these limits. The parametric values defined in the Electrical Charac-
teristics tables are not guaranteed at the absolute maximum ratings. The
“Recommended Operating Conditions” table will define the conditions for ac-
tual device operation.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
Symbol
Parameter
VIH Minimum High Level
Input Voltage
VIL Maximum Low Level
Input Voltage
VOH Minimum High Level
Output Voltage
VOL Maximum Low Level
Output Voltage
IIN
IOLD
IOHD
ICC
IOZ
Maximum Input
Leakage Current
Minimum Dynamic (Note 4)
Output Current
Maximum Quiescent
Supply Current
Maximum 3-STATE
Leakage Current
VOLP
VOLV
VIHD
VILD
Quiet Output
Maximum Dynamic VOL
Quiet Output
Minimum Dynamic VOL
Minimum High Level
Dynamic Input Voltage
Maximum Low Level
Dynamic Input Voltage
VCC
(V)
TA = +25˚C
TA = −40˚C to +85˚C Units
Conditions
Typ Guaranteed Limits
3.0 1.5
3.0 1.5
3.0 2.99
3.0
3.0 0.002
3.0
3.6
2.0
0.8
2.9
2.58
0.1
0.36
±0.1
2.0
0.8
2.9
2.48
0.1
0.44
±1.0
V VOUT = 0.1V
or VCC − 0.1V
V VOUT = 0.1V
or VCC − 0.1V
V IOUT = −50 µA
V VIN = VIL or VIH (Note 3)
IOH = −12 mA
V IOUT = 50 µA
V VIN = VIL or VIH (Note 3)
IOL = 12 mA
µA VI = VCC, GND
3.6
3.6
3.6 4.0
3.6 ±0.25
3.3 0.4
0.8
36
−25
40.0
±2.5
mA VOLD = 0.8V Max (Note 5)
mA VOHD = 2.0V Min (Note 5)
µA VIN = VCC
or GND
VI (OE) = VIL, VIH
µA VI = VCC, GND
VO = VCC, GND
V (Notes 6, 7)
3.3 −0.4
−0.8
V (Notes 6, 7)
3.3 1.7
2.0
V (Notes 6, 8)
3.3 1.7
0.8
V (Notes 6, 8)
Note 3: All outputs loaded thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: Incident wave switching on transmission lines with impedances as low as 75Ω for commercial temperature range is guaranteed for 74LVQ.
Note 6: Worst case package.
Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND.
Note 8: Max number of Data Inputs (n) switching. (n − 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD),
f = 1 MHz.
3 www.fairchildsemi.com
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Номер в каталоге | Описание | Производители |
74LVQ244SC | Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs | Fairchild Semiconductor |
74LVQ244SJ | Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs | Fairchild Semiconductor |
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