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74LVT245 PDF даташит

Спецификация 74LVT245 изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «3.3V Octal transceiver».

Детали детали

Номер произв 74LVT245
Описание 3.3V Octal transceiver
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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74LVT245 Даташит, Описание, Даташиты
74LVT245
3.3 V octal transceiver with direction pin (3-state)
Rev. 4 — 24 December 2013
Product data sheet
1. General description
The 74LVT245 is a high-performance BiCMOS product designed for VCC operation at
3.3 V.
This device is an octal transceiver featuring non-inverting 3-state bus compatible outputs
in both send and receive directions. The control function implementation minimizes
external timing requirements. It features an output enable (OE) input for easy cascading
and a direction (DIR) input for direction control.
2. Features and benefits
3-state buffers
Octal bidirectional bus interface
Input and output interface capability to systems at 5 V supply
TTL input and output switching levels
Output capability: +64 mA/32 mA
Latch-up protection exceeds 500 mA per JESD78 class II level A
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Bus-hold data inputs eliminate the need for external pull-up resistors for unused inputs
Live insertion/extraction permitted
Power-up 3-state
No bus current loading when output is tied to 5 V bus
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
74LVT245D 40 C to +85 C SO20
plastic small outline package; 20 leads;
body width 7.5 mm
74LVT245DB 40 C to +85 C
SSOP20
plastic shrink small outline package; 20 leads;
body width 5.3 mm
74LVT245PW 40 C to +85 C
TSSOP20 plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
74LVT245BQ 40 C to +85 C
DHVQFN20 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 20 terminals;
body 2.5 4.5 0.85 mm
Version
SOT163-1
SOT339-1
SOT360-1
SOT764-1









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74LVT245 Даташит, Описание, Даташиты
NXP Semiconductors
4. Functional diagram
DIR
1
2 A0
3 A1
A2
4
A3
5
A4
6
7 A5
A6
8
9 A7
Fig 1. Logic diagram
OE
19
B0 18
B1
17
B2
16
B3 15
B4
14
B5
13
B6
12
B7 11
mna174
74LVT245
3.3 V octal transceiver with direction pin (3-state)
19 G3
1
3EN1
3EN2
1
22
3
4
5
6
7
8
9
mna175
Fig 2. IEC logic symbol
18
17
16
15
14
13
12
11
74LVT245
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 24 December 2013
© NXP B.V. 2013. All rights reserved.
2 of 16









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74LVT245 Даташит, Описание, Даташиты
NXP Semiconductors
74LVT245
3.3 V octal transceiver with direction pin (3-state)
5. Pinning information
5.1 Pinning
DIR 1
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND 10
74LVT245
20 VCC
19 OE
18 B0
17 B1
16 B2
15 B3
14 B4
13 B5
12 B6
11 B7
001aah721
Fig 3. Pin configuration for SO20 and (T)SSOP20
terminal 1
index area
74LVT245
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND(1)
19 OE
18 B0
17 B1
16 B2
15 B3
14 B4
13 B5
12 B6
001aah722
Transparent top view
(1) The die substrate is attached to this pad using a
conductive die attach material. It can not be used as a
supply pin or input.
Fig 4. Pin configuration for DHVQFN20
5.2 Pin description
Table 2.
Symbol
DIR
A0 to A7
GND
B0 to B7
OE
VCC
Pin description
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
18, 17, 16, 15, 14, 13, 12, 11
19
20
Description
direction control
data input/output
ground (0 V)
data input/output
output enable input (active LOW)
supply voltage
74LVT245
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 24 December 2013
© NXP B.V. 2013. All rights reserved.
3 of 16










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