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PDF 74LVT32245 Data sheet ( Hoja de datos )
| Número de pieza | 74LVT32245 | |
| Descripción | Low Voltage 32-Bit Transceiver with 3-STATE Outputs | |
| Fabricantes | Fairchild Semiconductor | |
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March 2002
Revised June 2002
74LVT32245 • 74LVTH32245
Low Voltage 32-Bit Transceiver with 3-STATE Outputs
General Description
The LVT32245 and LVTH32245 contain thirty-two non-
inverting bidirectional buffers with 3-STATE outputs and are
intended for bus oriented applications. The devices are
byte controlled. Each byte has separate control inputs
which can be shorted together for full 32-bit operation. The
T/R inputs determine the direction of data flow through the
device. The OE inputs disable both the A and B ports by
placing them in a high impedance state.
The LVTH32245 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These non-inverting transceivers are designed for low volt-
age (3.3V) VCC applications, but with the capability to pro-
vide a TTL interface to a 5V environment. The LVT32245
and LVTH32245 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining low power dissipation.
Features
s Input and output interface capability to systems at
5V VCC
s Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH32245),
also available without bushold feature (74LVT32245).
s Live insertion/extraction permitted
s Power Up/Down high impedance provides glitch-free
bus loading
s Outputs source/sink −32 mA/+64 mA
s ESD performance:
Human-body model > 2000V
Machine model > 200V
Charged-device model > 1000V
s Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Ordering Code:
Order Number Package Number
Package Description
74LVT32245G
(Note 1)(Note 2)
BGA96A
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
(Preliminary)
74LVTH32245G
(Note 1)(Note 2)
BGA96A
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Note 1: Ordering code “G” indicates Trays.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
© 2002 Fairchild Semiconductor Corporation DS500433
www.fairchildsemi.com
1 page  
DC Electrical Characteristics (Continued)
Symbol
Parameter
IOZH (Note 5) 3-STATE Output Leakage Current
IOZH+
3-STATE Output Leakage Current
ICCH
Power Supply Current
VCC1 or VCC2
ICCL
Power Supply Current
VCC1 or VCC2
ICCZ
Power Supply Current
VCC1 or VCC2
ICCZ+
Power Supply Current
VCC1 or VCC2
VCC
(V)
3.6
3.6
3.6
3.6
3.6
3.6
TA = −40°C to +85°C
Min Max
5
10
0.19
5.0
0.19
0.19
Units
µA
µA
mA
mA
mA
mA
∆ICC
Increase in Power Supply Current
3.6
0.2 mA
(Note 8)
VCC1 or VCC2
Note 5: Applies to bushold versions only (74LVTH32245).
Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 8: This is the increase in supply current for each input that is at the specified voltage level rather than VCC or GND.
Conditions
VO = 3.6V
VCC < VO ≤ 5.5V
Outputs HIGH
Outputs LOW
Outputs Disabled
VCC ≤ VO ≤ 5.5V,
Outputs Disabled
One Input at VCC − 0.6V
Other Inputs at VCC or GND
Dynamic Switching Characteristics (Note 9)
Symbol
Parameter
VCC TA = 25°C
Units
(V) Min Typ Max
VOLP
Quiet Output Maximum Dynamic VOL
3.3
0.8
VOLV
Quiet Output Minimum Dynamic VOL
3.3 −0.8
Note 9: Characterized in SSOP package. Guaranteed parameter, but not tested.
Note 10: Max number of outputs defined as (n). n−1 data inputs are driven 0V to 3V. Output under test held LOW.
V
V
Conditions
CL = 50 pF, RL = 500Ω
(Note 10)
(Note 10)
AC Electrical Characteristics
Symbol
Parameter
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation Delay Data to Output
Output Enable Time
Output Disable Time
TA = −40°C to +85°C
CL = 50 pF, RL = 500Ω
VCC = 3.3V ± 0.3V
VCC = 2.7V
Min Max Min Max
1.5 3.5 1.5 3.9
1.3 3.5 1.3 3.9
1.5 4.5 1.5 5.3
1.6 5.3 1.6 6.9
2.3 5.4 2.3 6.1
2.2 5.1 2.2 5.4
Capacitance (Note 11)
Symbol
Parameter
Conditions
CIN Input Capacitance
VCC = 0V, VI = 0V or VCC
CI/O
Input/Output Capacitance
VCC = 3.0V, VO = 0V or VCC
Note 11: Capacitance is measured at frequency f = 1 MHz, per MIL-STD-883, Method 3012.
Typical
4
8
Units
ns
ns
ns
Units
pF
pF
5 www.fairchildsemi.com
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| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet 74LVT32245.PDF ] | |
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