DataSheet26.com

74LVT573WM PDF даташит

Спецификация 74LVT573WM изготовлена ​​​​«Fairchild Semiconductor» и имеет функцию, называемую «Low Voltage Octal Transparent Latch with 3-STATE Outputs».

Детали детали

Номер произв 74LVT573WM
Описание Low Voltage Octal Transparent Latch with 3-STATE Outputs
Производители Fairchild Semiconductor
логотип Fairchild Semiconductor логотип 

7 Pages
scroll

No Preview Available !

74LVT573WM Даташит, Описание, Даташиты
March 1999
Revised March 1999
74LVT573 • 74LVTH573
Low Voltage Octal Transparent Latch
with 3-STATE Outputs
General Description
The LVT573 and LVTH573 consist of eight latches with 3-
STATE outputs for bus organized system applications. The
latches appear transparent to the data when Latch Enable
(LE) is HIGH. When LE is low, the data satisfying the input
timing requirements is latched. Data appears on the bus
when the Output Enable (OE) is LOW. When OE is HIGH,
the bus output is in the high impedance state.
The LVTH573 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
These octal latches are designed for low-voltage (3.3V)
VCC applications, but with the capability to provide a TTL
interface to a 5V environment. The LVT573 and LVTH573
are fabricated with an advanced BiCMOS technology to
achieve high speed operation similar to 5V ABT while
maintaining a low power dissipation.
Features
s Input and output interface capability to systems at
5V VCC
s Bushold data inputs eliminate the need for external pull-
up resistors to hold unused inputs (74LVTH573), also
available without bushold feature (74LVT573).
s Live insertion/extraction permitted
s Power Up/Down high impedance provides glitch-free
bus loading
s Outputs source/sink 32 mA/+64 mA
s Functionally compatible with the 74 series 573
s Latch-up performance exceeds 500 mA
Ordering Code:
Order Number Package Number
Package Description
74LVT573WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74LVT573SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II 5.3mm Wide
74LVT573MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVT573MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LVTH573WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74LVTH573SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II 5.3mm Wide
74LVTH573MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVTH573MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
© 1999 Fairchild Semiconductor Corporation DS012450.prf
www.fairchildsemi.com









No Preview Available !

74LVT573WM Даташит, Описание, Даташиты
Connection Diagram
Pin Descriptions
Pin Names
Description
D0–D7
LE
Data Inputs
Latch Enable Input
OE Output Enable Input
O0–O7
3-STATE Latch Outputs
Truth Table
Inputs
Outputs
LE OE Dn
On
XHX
Z
HL L
L
HLH
H
LLX
O0
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
O0 = Previous O0 before HIGH to LOW transition of Latch Enable
Functional Description
The LVT573 and LVTH573 contain eight D-type latches with 3-STATE standard outputs. When the Latch Enable (LE) input
is HIGH, data on the Dn inputs enters the latches. In this condition the latches are transparent, i.e., a latch output will
change state each time its D-type input changes. When LE is LOW, the latches store the information that was present on
the D-type inputs a setup time preceding the HIGH-to-LOW transition of LE. The 3-STATE standard outputs are controlled
by the Output Enable (OE) input. When OE is LOW, the standard outputs are in the 2-state mode. When OE is HIGH, the
standard outputs are in the high impedance mode but this does not interfere with entering new data into the latches.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com
2









No Preview Available !

74LVT573WM Даташит, Описание, Даташиты
Absolute Maximum Ratings(Note 1)
Symbol
VCC
VI
VO
Parameter
Supply Voltage
DC Input Voltage
DC Output Voltage
IIK DC Input Diode Current
IOK DC Output Diode Current
IO DC Output Current
ICC
IGND
TSTG
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
Value
0.5 to +4.6
0.5 to +7.0
0.5 to +7.0
0.5 to +7.0
50
50
64
128
±64
±128
65 to +150
Recommended Operating Conditions
Conditions
Output in 3-STATE
Output in High or Low State (Note 2)
VI < GND
VO < GND
VO > VCC Output at High State
VO > VCC Output at Low State
Units
V
V
V
mA
mA
mA
mA
mA
°C
Symbol
Parameter
Min
Max
Units
VCC Supply Voltage
2.7 3.6 V
VI Input Voltage
0 5.5 V
IOH High-Level Output Current
32 mA
IOL Low-Level Output Current
64 mA
TA Free-Air Operating Temperature
40 85 °C
t/V
Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V
0 10 ns/V
Note 1: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 2: IO Absolute Maximum Rating must be observed.
DC Electrical Characteristics
Symbol
VIK
VIH
VIL
VOH
VOL
II(HOLD)
(Note 4)
II(OD)
(Note 4)
II
IOFF
IPU/PD
IOZL
Parameter
Input Clamp Diode Voltage
Input HIGH Voltage
Input LOW Voltage
VCC
(V)
2.7
2.7–3.6
2.7–3.6
T A = −40°C to +85°C
Min Typ Max
(Note 3)
1.2
2.0
0.8
Output HIGH Voltage
Output LOW Voltage
Bushold Input Minimum Drive
Bushold Input Over-Drive
Current to Change State
Input Current
Control Pins
Data Pins
2.7–3.6
2.7
3.0
2.7
2.7
3.0
3.0
3.0
3.0
3.0
3.6
3.6
3.6
VCC 0.2
2.4
2.0
75
75
500
500
Power Off Leakage Current
Power up/down 3-STATE
Output Current
3-STATE Output Leakage Current
0
0–1.5V
3.6
0.2
0.5
0.4
0.5
0.55
10
±1
5
1
±100
±100
5
Units
Conditions
V II = −18 mA
V VO 0.1V or
V VO VCC 0.1V
IOH = −100 µA
V IOH = −8 mA
IOH = −32 mA
IOL = 100 µA
IOL = 24 mA
V IOL = 16 mA
IOL = 32 mA
IOL = 64 mA
µA VI = 0.8V
VI = 2.0V
(Note 5)
µA
(Note 6)
VI = 5.5V
µA VI = 0V or VCC
VI = 0V
VI = VCC
µA 0V VI or VO 5.5V
µA VO = 0.5V to 3.0V
VI = GND or VCC
µA VO = 0.5V
3 www.fairchildsemi.com










Скачать PDF:

[ 74LVT573WM.PDF Даташит ]

Номер в каталогеОписаниеПроизводители
74LVT573WMLow Voltage Octal Transparent Latch with 3-STATE OutputsFairchild Semiconductor
Fairchild Semiconductor

Номер в каталоге Описание Производители
TL431

100 мА, регулируемый прецизионный шунтирующий регулятор

Unisonic Technologies
Unisonic Technologies
IRF840

8 А, 500 В, N-канальный МОП-транзистор

Vishay
Vishay
LM317

Линейный стабилизатор напряжения, 1,5 А

STMicroelectronics
STMicroelectronics

DataSheet26.com    |    2020    |

  Контакты    |    Поиск